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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [jsc][mips] Add missing MacroAssembler functions after r214187"
href="https://bugs.webkit.org/show_bug.cgi?id=170089#c5">Comment # 5</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [jsc][mips] Add missing MacroAssembler functions after r214187"
href="https://bugs.webkit.org/show_bug.cgi?id=170089">bug 170089</a>
from <span class="vcard"><a class="email" href="mailto:guijemont@igalia.com" title="Guillaume Emont <guijemont@igalia.com>"> <span class="fn">Guillaume Emont</span></a>
</span></b>
<pre>(In reply to Adrian Perez from <a href="show_bug.cgi?id=170089#c4">comment #4</a>)
<span class="quote">> (In reply to Yusuke Suzuki from <a href="show_bug.cgi?id=170089#c3">comment #3</a>)
> > Comment on <span class=""><a href="attachment.cgi?id=305523&action=diff" name="attach_305523" title="Patch">attachment 305523</a> <a href="attachment.cgi?id=305523&action=edit" title="Patch">[details]</a></span>
> > Patch
> >
> > View in context:
> > <a href="https://bugs.webkit.org/attachment.cgi?id=305523&action=review">https://bugs.webkit.org/attachment.cgi?id=305523&action=review</a>
> >
> > r=me with comment.
> >
> > > Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h:2462
> > > + void loadFloat(ImplicitAddress address, FPRegisterID dest)
> > > + {
> > > + if (address.offset >= -32768 && address.offset <= 32767
> > > + && !m_fixedWidth) {
> > > + m_assembler.lwc1(dest, address.base, address.offset);
> > > + } else {
> > > + /*
> > > + lui addrTemp, (offset + 0x8000) >> 16
> > > + addu addrTemp, addrTemp, base
> > > + lwc1 dest, (offset & 0xffff)(addrTemp)
> > > + */
> > > + m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
> > > + m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
> > > + m_assembler.lwc1(dest, addrTempRegister, address.offset);
> > > + }
> > > + }
> >
> > Looking the loadDouble code, we can see WTF_MIPS_ISA(1) guard.
> > Isn't it required here?
>
> I think Yusuke is right. FPRegisterIDs refer to 64-bit registers. In
> MIPS32/MIPS-II “ldc1” can be used to load a 32-bit value directly,
> but in MIPS-I it is needed to use two “lwc1” instructions, one for
> each 32-bit half of the 64-bit value.</span >
No, I don't think we need that guard. loadDouble/storeDouble use that because MIPS-I does not contain the ldc1 (resp. sdc1) instruction, and therefore two lwc1 (resp swc1) instructions are used instead for the MIPS-I version. In loadFloat/storeFloat, we do not use ldc1/sdc1, and all the instructions that we use are MIPS-I compatible AFAIK, so there's no need for an alternative version.
You can see that the pre-existing loadFloat/storeFloat with a BaseIndex argument don't have such a guard either, for the same reasons.
Another way to put it: the need for special cases for MIPS-I only exists when dealing with doubles. The fact of using an ImplicitAddress instead of a BaseIndex does not incur this need.
Another debate is whether we still want to support MIPS-I, I don't know if there still are many devices using that where it makes sense to use webkit, though I could be wrong, because, hey, we have these guards in the code.</pre>
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