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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [jsc][mips] Add missing MacroAssembler functions after r214187"
href="https://bugs.webkit.org/show_bug.cgi?id=170089#c4">Comment # 4</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [jsc][mips] Add missing MacroAssembler functions after r214187"
href="https://bugs.webkit.org/show_bug.cgi?id=170089">bug 170089</a>
from <span class="vcard"><a class="email" href="mailto:aperez@igalia.com" title="Adrian Perez <aperez@igalia.com>"> <span class="fn">Adrian Perez</span></a>
</span></b>
<pre>(In reply to Yusuke Suzuki from <a href="show_bug.cgi?id=170089#c3">comment #3</a>)
<span class="quote">> Comment on <span class=""><a href="attachment.cgi?id=305523&action=diff" name="attach_305523" title="Patch">attachment 305523</a> <a href="attachment.cgi?id=305523&action=edit" title="Patch">[details]</a></span>
> Patch
>
> View in context:
> <a href="https://bugs.webkit.org/attachment.cgi?id=305523&action=review">https://bugs.webkit.org/attachment.cgi?id=305523&action=review</a>
>
> r=me with comment.
>
> > Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h:2462
> > + void loadFloat(ImplicitAddress address, FPRegisterID dest)
> > + {
> > + if (address.offset >= -32768 && address.offset <= 32767
> > + && !m_fixedWidth) {
> > + m_assembler.lwc1(dest, address.base, address.offset);
> > + } else {
> > + /*
> > + lui addrTemp, (offset + 0x8000) >> 16
> > + addu addrTemp, addrTemp, base
> > + lwc1 dest, (offset & 0xffff)(addrTemp)
> > + */
> > + m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
> > + m_assembler.addu(addrTempRegister, addrTempRegister, address.base);
> > + m_assembler.lwc1(dest, addrTempRegister, address.offset);
> > + }
> > + }
>
> Looking the loadDouble code, we can see WTF_MIPS_ISA(1) guard.
> Isn't it required here?</span >
I think Yusuke is right. FPRegisterIDs refer to 64-bit registers. In
MIPS32/MIPS-II “ldc1” can be used to load a 32-bit value directly,
but in MIPS-I it is needed to use two “lwc1” instructions, one for
each 32-bit half of the 64-bit value.</pre>
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