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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - If B3->Air lowering moves a child to the result tmp when using an Inst with a x86-style UseDef operand, then other uses of that child should also use the result tmp"
href="https://bugs.webkit.org/show_bug.cgi?id=151315#c3">Comment # 3</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - If B3->Air lowering moves a child to the result tmp when using an Inst with a x86-style UseDef operand, then other uses of that child should also use the result tmp"
href="https://bugs.webkit.org/show_bug.cgi?id=151315">bug 151315</a>
from <span class="vcard"><a class="email" href="mailto:fpizlo@apple.com" title="Filip Pizlo <fpizlo@apple.com>"> <span class="fn">Filip Pizlo</span></a>
</span></b>
<pre>Whoa, our register allocator already does the magically correct thing. This is Ben's comment:
// We do not want the Use() of this move to interfere with the Def(), even if it is live
// after the Move. If we were to add the interference edge, it would be impossible to
// coalesce the Move even if the two Tmp never interfere anywhere.
This is the verbiage in the IRC paper:
Move instructions are given special consideration. It is important not to create
artifical interferences between the source and destination of a move. Consider the
program:
t := s
...
x := ... s ... ...
y := ... t ...
; copy
; use of s
; use of t
After the copy instruction both s and t are live, and an interference edge would be
added between s and t, since t is being defined at a point where s is live. The
solution is to temporarily remove s from the live set and continue.</pre>
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