[Webkit-unassigned] [Bug 230622] Allow DFG to use regCS0 GPR (LLInt metadataTable) on ARMv7

[bugzilla-daemon at webkit.org]

https://bugs.webkit.org/show_bug.cgi?id=230622

--- Comment #17 from Geza Lore <glore at igalia.com> ---
> I'm pretty confused as to what this is doing and why it's needed.
> 
> > Source/JavaScriptCore/jit/CallFrameShuffleData.cpp:64
> > +        VirtualRegister saveSlot { saveSlotIndexInCPURegisters / 2 };
> 
> Why /2?

there are two (32-bit) CPU register save slots per one (64-bit) virtual register slot on the stack. csr0/csr1 both need to map onto the first virual register slot (that's where the prologue puts them), but are in different halves (paload/tag). If we had csr2/csr3 would go into the second virtual register slot, hence the /2 (and the peculiar rounding bias above)

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