[Webkit-unassigned] [Bug 157741] JSC: DFG::SpeculativeJIT::compile special case for MIPS for PutByValWithThis

bugzilla-daemon at webkit.org bugzilla-daemon at webkit.org
Mon May 16 10:41:59 PDT 2016


--- Comment #3 from Guillaume Emont <guijemont at igalia.com> ---
This is the code my patch generates:

  move    a0,s8                                                                                                                                                
  move    a1,zero                                                                                                                                              
  sw      v1,-12(s8)                                                                                                                                           
  sw      v0,-16(s8)                                                                                                                                           
  lw      t6,-20(s8)                                                                                                                                           
  lw      v0,-24(s8)                                                                                                                                           
  sw      t5,-36(s8)                                                                                                                                           
  sw      t4,-40(s8)                                                                                                                                           
  lw      v1,-12(s8)                                                                                                                                           
  lw      t4,-16(s8)                                                                                                                                           
  move    a2,v0                                                                                                                                                
  move    a3,t6                                                                                                                                                
  sw      t2,16(sp)                                                                                                                                            
  sw      t3,20(sp)                                                                                                                                            
  sw      t4,24(sp)                                                                                                                                            
  sw      v1,28(sp)                                                                                                                                            
  sw      t3,-28(s8)                                                                                                                                           
  sw      t2,-32(s8)                                                                                                                                           
  lw      v0,-36(s8)                                                                                                                                           
  lw      v1,-40(s8)                                                                                                                                           
  sw      v1,32(sp)                                                                                                                                            
  sw      v0,36(sp)                                                                                                                                            
  li      t0,2                                                                                                                                                 
  sw      t0,28(s8)                                                                                                                                            
  lui     t9,0x1d3                                                                                                                                             
  ori     t9,t9,0x33f4                                                                                                                                         
  jalr    t9                                                                                                                                                   

I am wondering whether there is a way to have basePayload and baseTag load directly into the right argument registers, which would save these two moves.

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