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<dl class="meta">
<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/279653">279653</a></dd>
<dt>Author</dt> <dd>ysuzuki@apple.com</dd>
<dt>Date</dt> <dd>2021-07-07 11:44:55 -0700 (Wed, 07 Jul 2021)</dd>
</dl>

<h3>Log Message</h3>
<pre><a href="http://trac.webkit.org/projects/webkit/changeset/270214">r270214</a> broke testb3 on arm64e
https://bugs.webkit.org/show_bug.cgi?id=227713

Reviewed by Saam Barati.

ARM64E CAS lacks isBranch case. This patch adds isBranch implementation.
We also adjust disasm scanning test to support CAS in ARM64E.

* assembler/testmasm.cpp:
(JSC::testAtomicStrongCASFill8):
(JSC::testAtomicStrongCASFill16):
* b3/B3LowerToAir.cpp:
* b3/testb3_8.cpp:
(testAtomicWeakCAS):
(testAtomicStrongCAS):
(testAtomicXchg):</pre>

<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblertestmasmcpp">trunk/Source/JavaScriptCore/assembler/testmasm.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3B3LowerToAircpp">trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3testb3_8cpp">trunk/Source/JavaScriptCore/b3/testb3_8.cpp</a></li>
</ul>

</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (279652 => 279653)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog    2021-07-07 18:34:20 UTC (rev 279652)
+++ trunk/Source/JavaScriptCore/ChangeLog       2021-07-07 18:44:55 UTC (rev 279653)
</span><span class="lines">@@ -1,5 +1,24 @@
</span><span class="cx"> 2021-07-06  Yusuke Suzuki  <ysuzuki@apple.com>
</span><span class="cx"> 
</span><ins>+        r270214 broke testb3 on arm64e
+        https://bugs.webkit.org/show_bug.cgi?id=227713
+
+        Reviewed by Saam Barati.
+
+        ARM64E CAS lacks isBranch case. This patch adds isBranch implementation.
+        We also adjust disasm scanning test to support CAS in ARM64E.
+
+        * assembler/testmasm.cpp:
+        (JSC::testAtomicStrongCASFill8):
+        (JSC::testAtomicStrongCASFill16):
+        * b3/B3LowerToAir.cpp:
+        * b3/testb3_8.cpp:
+        (testAtomicWeakCAS):
+        (testAtomicStrongCAS):
+        (testAtomicXchg):
+
+2021-07-06  Yusuke Suzuki  <ysuzuki@apple.com>
+
</ins><span class="cx">         Unreviewed, build fix after r279630
</span><span class="cx">         https://bugs.webkit.org/show_bug.cgi?id=223166
</span><span class="cx"> 
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblertestmasmcpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/testmasm.cpp (279652 => 279653)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/testmasm.cpp       2021-07-07 18:34:20 UTC (rev 279652)
+++ trunk/Source/JavaScriptCore/assembler/testmasm.cpp  2021-07-07 18:44:55 UTC (rev 279653)
</span><span class="lines">@@ -2448,6 +2448,52 @@
</span><span class="cx"> 
</span><span class="cx"> #endif // CPU(X86_64) || CPU(ARM64)
</span><span class="cx"> 
</span><ins>+#if CPU(ARM64E)
+
+void testAtomicStrongCASFill8()
+{
+    auto test = compile([] (CCallHelpers& jit) {
+        emitFunctionPrologue(jit);
+
+        jit.atomicStrongCAS8(GPRInfo::argumentGPR0, GPRInfo::argumentGPR1, CCallHelpers::Address(GPRInfo::argumentGPR2));
+        jit.move(GPRInfo::argumentGPR0, GPRInfo::returnValueGPR);
+
+        emitFunctionEpilogue(jit);
+        jit.ret();
+    });
+
+    uint8_t data[] = {
+        0xff, 0xff,
+    };
+    uint32_t result = invoke<uint32_t>(test, 0xffffffffffffffffULL, 0, data);
+    CHECK_EQ(result, 0xff);
+    CHECK_EQ(data[0], 0);
+    CHECK_EQ(data[1], 0xff);
+}
+
+void testAtomicStrongCASFill16()
+{
+    auto test = compile([] (CCallHelpers& jit) {
+        emitFunctionPrologue(jit);
+
+        jit.atomicStrongCAS16(GPRInfo::argumentGPR0, GPRInfo::argumentGPR1, CCallHelpers::Address(GPRInfo::argumentGPR2));
+        jit.move(GPRInfo::argumentGPR0, GPRInfo::returnValueGPR);
+
+        emitFunctionEpilogue(jit);
+        jit.ret();
+    });
+
+    uint16_t data[] = {
+        0xffff, 0xffff,
+    };
+    uint32_t result = invoke<uint32_t>(test, 0xffffffffffffffffULL, 0, data);
+    CHECK_EQ(result, 0xffff);
+    CHECK_EQ(data[0], 0);
+    CHECK_EQ(data[1], 0xffff);
+}
+
+#endif // CPU(ARM64)
+
</ins><span class="cx"> #if CPU(ARM64)
</span><span class="cx"> void testLoadStorePair64Int64()
</span><span class="cx"> {
</span><span class="lines">@@ -3834,6 +3880,11 @@
</span><span class="cx">     RUN(testExtractRegister64());
</span><span class="cx"> #endif
</span><span class="cx"> 
</span><ins>+#if CPU(ARM64E)
+    RUN(testAtomicStrongCASFill8());
+    RUN(testAtomicStrongCASFill16());
+#endif
+
</ins><span class="cx"> #if CPU(X86) || CPU(X86_64) || CPU(ARM64)
</span><span class="cx">     FOR_EACH_DOUBLE_CONDITION_RUN(testCompareFloat);
</span><span class="cx"> #endif
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3B3LowerToAircpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp (279652 => 279653)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp  2021-07-07 18:34:20 UTC (rev 279652)
+++ trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp     2021-07-07 18:44:55 UTC (rev 279653)
</span><span class="lines">@@ -2256,11 +2256,34 @@
</span><span class="cx">         }
</span><span class="cx"> 
</span><span class="cx">         if (isARM64E()) {
</span><ins>+            if (isBranch) {
+                switch (width) {
+                case Width8:
+                    append(Air::ZeroExtend8To32, expectedValueTmp, expectedValueTmp);
+                    break;
+                case Width16:
+                    append(Air::ZeroExtend16To32, expectedValueTmp, expectedValueTmp);
+                    break;
+                case Width32:
+                case Width64:
+                    break;
+                }
+            }
</ins><span class="cx">             append(relaxedMoveForType(atomic->accessType()), expectedValueTmp, valueResultTmp);
</span><span class="cx">             appendTrapping(OPCODE_FOR_WIDTH(AtomicStrongCAS, width), valueResultTmp, newValueTmp, address);
</span><span class="cx">             if (returnsOldValue)
</span><span class="cx">                 return;
</span><span class="cx">             if (isBranch) {
</span><ins>+                switch (width) {
+                case Width8:
+                case Width16:
+                case Width32:
+                    appendTrapping(Air::Branch32, Arg::relCond(MacroAssembler::Equal), valueResultTmp, expectedValueTmp);
+                    break;
+                case Width64:
+                    appendTrapping(Air::Branch64, Arg::relCond(MacroAssembler::Equal), valueResultTmp, expectedValueTmp);
+                    break;
+                }
</ins><span class="cx">                 m_blockToBlock[m_block]->setSuccessors(success, failure);
</span><span class="cx">                 return;
</span><span class="cx">             }
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3testb3_8cpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/testb3_8.cpp (279652 => 279653)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/testb3_8.cpp      2021-07-07 18:34:20 UTC (rev 279652)
+++ trunk/Source/JavaScriptCore/b3/testb3_8.cpp 2021-07-07 18:44:55 UTC (rev 279653)
</span><span class="lines">@@ -41,12 +41,16 @@
</span><span class="cx">             checkUsesInstruction(compilation, "lock");
</span><span class="cx">             checkUsesInstruction(compilation, "cmpxchg");
</span><span class="cx">         } else {
</span><del>-            if (fenced) {
-                checkUsesInstruction(compilation, "ldax");
-                checkUsesInstruction(compilation, "stlx");
-            } else {
-                checkUsesInstruction(compilation, "ldx");
-                checkUsesInstruction(compilation, "stx");
</del><ins>+            if (isARM64E())
+                checkUsesInstruction(compilation, "casal");
+            else {
+                if (fenced) {
+                    checkUsesInstruction(compilation, "ldax");
+                    checkUsesInstruction(compilation, "stlx");
+                } else {
+                    checkUsesInstruction(compilation, "ldx");
+                    checkUsesInstruction(compilation, "stx");
+                }
</ins><span class="cx">             }
</span><span class="cx">         }
</span><span class="cx">     };
</span><span class="lines">@@ -288,12 +292,16 @@
</span><span class="cx">             checkUsesInstruction(compilation, "lock");
</span><span class="cx">             checkUsesInstruction(compilation, "cmpxchg");
</span><span class="cx">         } else {
</span><del>-            if (fenced) {
-                checkUsesInstruction(compilation, "ldax");
-                checkUsesInstruction(compilation, "stlx");
-            } else {
-                checkUsesInstruction(compilation, "ldx");
-                checkUsesInstruction(compilation, "stx");
</del><ins>+            if (isARM64E())
+                checkUsesInstruction(compilation, "casal");
+            else {
+                if (fenced) {
+                    checkUsesInstruction(compilation, "ldax");
+                    checkUsesInstruction(compilation, "stlx");
+                } else {
+                    checkUsesInstruction(compilation, "ldx");
+                    checkUsesInstruction(compilation, "stx");
+                }
</ins><span class="cx">             }
</span><span class="cx">         }
</span><span class="cx">     };
</span><span class="lines">@@ -544,6 +552,39 @@
</span><span class="cx">         CHECK_EQ(value[1], 13);
</span><span class="cx">         checkMyDisassembly(*code, true);
</span><span class="cx">     }
</span><ins>+
+    {
+        Procedure proc;
+        BasicBlock* root = proc.addBlock();
+
+        Value* ptr = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+        root->appendNew<Value>(
+            proc, Return, Origin(),
+            root->appendNew<AtomicValue>(
+                proc, AtomicStrongCAS, Origin(), width,
+                root->appendIntConstant(proc, Origin(), type, 0x0f00000000000000ULL + 42),
+                root->appendIntConstant(proc, Origin(), type, 0xbeef),
+                ptr));
+
+        auto code = compileProc(proc);
+        T value[2];
+        T result;
+        value[0] = 42;
+        value[1] = 13;
+        result = invoke<T>(*code, value);
+        if (width == Width64)
+            CHECK_EQ(value[0], static_cast<T>(42));
+        else
+            CHECK_EQ(value[0], static_cast<T>(0xbeef));
+        CHECK_EQ(value[1], 13);
+        CHECK_EQ(result, static_cast<T>(42));
+        value[0] = static_cast<T>(300);
+        result = invoke<T>(*code, value);
+        CHECK_EQ(value[0], static_cast<T>(300));
+        CHECK_EQ(value[1], 13);
+        CHECK_EQ(result, static_cast<T>(300));
+        checkMyDisassembly(*code, true);
+    }
</ins><span class="cx"> }
</span><span class="cx"> 
</span><span class="cx"> template<typename T>
</span><span class="lines">@@ -594,12 +635,37 @@
</span><span class="cx">             if (AtomicXchg != opcode)
</span><span class="cx">                 checkUsesInstruction(compilation, "lock");
</span><span class="cx">         } else {
</span><del>-            if (fenced) {
-                checkUsesInstruction(compilation, "ldax");
-                checkUsesInstruction(compilation, "stlx");
</del><ins>+            if (isARM64E()) {
+                switch (opcode) {
+                case AtomicXchgAdd:
+                    checkUsesInstruction(compilation, "ldaddal");
+                    break;
+                case AtomicXchgAnd:
+                    checkUsesInstruction(compilation, "ldclral");
+                    break;
+                case AtomicXchgOr:
+                    checkUsesInstruction(compilation, "ldsetal");
+                    break;
+                case AtomicXchgSub:
+                    checkUsesInstruction(compilation, "ldaddal");
+                    break;
+                case AtomicXchgXor:
+                    checkUsesInstruction(compilation, "ldeoral");
+                    break;
+                case AtomicXchg:
+                    checkUsesInstruction(compilation, "swpal");
+                    break;
+                default:
+                    RELEASE_ASSERT_NOT_REACHED();
+                }
</ins><span class="cx">             } else {
</span><del>-                checkUsesInstruction(compilation, "ldx");
-                checkUsesInstruction(compilation, "stx");
</del><ins>+                if (fenced) {
+                    checkUsesInstruction(compilation, "ldax");
+                    checkUsesInstruction(compilation, "stlx");
+                } else {
+                    checkUsesInstruction(compilation, "ldx");
+                    checkUsesInstruction(compilation, "stx");
+                }
</ins><span class="cx">             }
</span><span class="cx">         }
</span><span class="cx">     };
</span></span></pre>
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