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<dl class="meta">
<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/198953">198953</a></dd>
<dt>Author</dt> <dd>commit-queue@webkit.org</dd>
<dt>Date</dt> <dd>2016-04-01 12:20:08 -0700 (Fri, 01 Apr 2016)</dd>
</dl>
<h3>Log Message</h3>
<pre>[JSC][x86] Add the 3 operands form of floating point substraction
https://bugs.webkit.org/show_bug.cgi?id=156095
Patch by Benjamin Poulain <bpoulain@apple.com> on 2016-04-01
Reviewed by Geoffrey Garen.
Same old, same old. Add the AVX form of subsd and subss.
Unfortunately, we cannot benefit from the 3 register form
in B3 yet because the Air script does not support CPU flags yet.
That can be fixed later.
* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::subDouble):
(JSC::MacroAssemblerX86Common::subFloat):
* assembler/X86Assembler.h:
(JSC::X86Assembler::vsubsd_rr):
(JSC::X86Assembler::subsd_mr):
(JSC::X86Assembler::vsubsd_mr):
(JSC::X86Assembler::vsubss_rr):
(JSC::X86Assembler::subss_mr):
(JSC::X86Assembler::vsubss_mr):
(JSC::X86Assembler::X86InstructionFormatter::SingleInstructionBufferWriter::memoryModRM):
* b3/air/AirOpcode.opcodes:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerMacroAssemblerX86Commonh">trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerX86Assemblerh">trunk/Source/JavaScriptCore/assembler/X86Assembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3airAirOpcodeopcodes">trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (198952 => 198953)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2016-04-01 19:15:05 UTC (rev 198952)
+++ trunk/Source/JavaScriptCore/ChangeLog 2016-04-01 19:20:08 UTC (rev 198953)
</span><span class="lines">@@ -1,3 +1,29 @@
</span><ins>+2016-04-01 Benjamin Poulain <bpoulain@apple.com>
+
+ [JSC][x86] Add the 3 operands form of floating point substraction
+ https://bugs.webkit.org/show_bug.cgi?id=156095
+
+ Reviewed by Geoffrey Garen.
+
+ Same old, same old. Add the AVX form of subsd and subss.
+
+ Unfortunately, we cannot benefit from the 3 register form
+ in B3 yet because the Air script does not support CPU flags yet.
+ That can be fixed later.
+
+ * assembler/MacroAssemblerX86Common.h:
+ (JSC::MacroAssemblerX86Common::subDouble):
+ (JSC::MacroAssemblerX86Common::subFloat):
+ * assembler/X86Assembler.h:
+ (JSC::X86Assembler::vsubsd_rr):
+ (JSC::X86Assembler::subsd_mr):
+ (JSC::X86Assembler::vsubsd_mr):
+ (JSC::X86Assembler::vsubss_rr):
+ (JSC::X86Assembler::subss_mr):
+ (JSC::X86Assembler::vsubss_mr):
+ (JSC::X86Assembler::X86InstructionFormatter::SingleInstructionBufferWriter::memoryModRM):
+ * b3/air/AirOpcode.opcodes:
+
</ins><span class="cx"> 2016-04-01 Alberto Garcia <berto@igalia.com>
</span><span class="cx">
</span><span class="cx"> [JSC] Missing PATH_MAX definition
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerMacroAssemblerX86Commonh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h (198952 => 198953)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h 2016-04-01 19:15:05 UTC (rev 198952)
+++ trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h 2016-04-01 19:20:08 UTC (rev 198953)
</span><span class="lines">@@ -1245,35 +1245,89 @@
</span><span class="cx">
</span><span class="cx"> void subDouble(FPRegisterID src, FPRegisterID dest)
</span><span class="cx"> {
</span><del>- ASSERT(isSSE2Present());
- m_assembler.subsd_rr(src, dest);
</del><ins>+ subDouble(dest, src, dest);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void subDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
</span><span class="cx"> {
</span><del>- // B := A - B is invalid.
- ASSERT(op1 == dest || op2 != dest);
</del><ins>+ if (supportsAVX())
+ m_assembler.vsubsd_rr(op1, op2, dest);
+ else {
+ ASSERT(isSSE2Present());
</ins><span class="cx">
</span><del>- moveDouble(op1, dest);
- subDouble(op2, dest);
</del><ins>+ // B := A - B is invalid.
+ ASSERT(op1 == dest || op2 != dest);
+ moveDouble(op1, dest);
+ m_assembler.subsd_rr(op2, dest);
+ }
</ins><span class="cx"> }
</span><span class="cx">
</span><ins>+ void subDouble(FPRegisterID op1, Address op2, FPRegisterID dest)
+ {
+ if (supportsAVX())
+ m_assembler.vsubsd_mr(op1, op2.offset, op2.base, dest);
+ else {
+ moveDouble(op1, dest);
+ m_assembler.subsd_mr(op2.offset, op2.base, dest);
+ }
+ }
+
+ void subDouble(FPRegisterID op1, BaseIndex op2, FPRegisterID dest)
+ {
+ if (supportsAVX())
+ m_assembler.vsubsd_mr(op1, op2.offset, op2.base, op2.index, op2.scale, dest);
+ else {
+ moveDouble(op1, dest);
+ m_assembler.subsd_mr(op2.offset, op2.base, op2.index, op2.scale, dest);
+ }
+ }
+
</ins><span class="cx"> void subDouble(Address src, FPRegisterID dest)
</span><span class="cx"> {
</span><del>- ASSERT(isSSE2Present());
- m_assembler.subsd_mr(src.offset, src.base, dest);
</del><ins>+ subDouble(dest, src, dest);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void subFloat(FPRegisterID src, FPRegisterID dest)
</span><span class="cx"> {
</span><del>- ASSERT(isSSE2Present());
- m_assembler.subss_rr(src, dest);
</del><ins>+ subFloat(dest, src, dest);
</ins><span class="cx"> }
</span><span class="cx">
</span><ins>+ void subFloat(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
+ {
+ if (supportsAVX())
+ m_assembler.vsubss_rr(op1, op2, dest);
+ else {
+ ASSERT(isSSE2Present());
+ // B := A - B is invalid.
+ ASSERT(op1 == dest || op2 != dest);
+ moveDouble(op1, dest);
+ m_assembler.subss_rr(op2, dest);
+ }
+ }
+
+ void subFloat(FPRegisterID op1, Address op2, FPRegisterID dest)
+ {
+ if (supportsAVX())
+ m_assembler.vsubss_mr(op1, op2.offset, op2.base, dest);
+ else {
+ moveDouble(op1, dest);
+ m_assembler.subss_mr(op2.offset, op2.base, dest);
+ }
+ }
+
+ void subFloat(FPRegisterID op1, BaseIndex op2, FPRegisterID dest)
+ {
+ if (supportsAVX())
+ m_assembler.vsubss_mr(op1, op2.offset, op2.base, op2.index, op2.scale, dest);
+ else {
+ moveDouble(op1, dest);
+ m_assembler.subss_mr(op2.offset, op2.base, op2.index, op2.scale, dest);
+ }
+ }
+
</ins><span class="cx"> void subFloat(Address src, FPRegisterID dest)
</span><span class="cx"> {
</span><del>- ASSERT(isSSE2Present());
- m_assembler.subss_mr(src.offset, src.base, dest);
</del><ins>+ subFloat(dest, src, dest);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void mulDouble(FPRegisterID src, FPRegisterID dest)
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerX86Assemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/X86Assembler.h (198952 => 198953)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/X86Assembler.h 2016-04-01 19:15:05 UTC (rev 198952)
+++ trunk/Source/JavaScriptCore/assembler/X86Assembler.h 2016-04-01 19:20:08 UTC (rev 198953)
</span><span class="lines">@@ -2441,24 +2441,66 @@
</span><span class="cx"> m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)src);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void vsubsd_rr(XMMRegisterID a, XMMRegisterID b, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F2, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)a, (RegisterID)b);
+ }
+
</ins><span class="cx"> void subsd_mr(int offset, RegisterID base, XMMRegisterID dst)
</span><span class="cx"> {
</span><span class="cx"> m_formatter.prefix(PRE_SSE_F2);
</span><span class="cx"> m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, (RegisterID)dst, base, offset);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void subsd_mr(int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+ {
+ m_formatter.prefix(PRE_SSE_F2);
+ m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, dst, base, index, scale, offset);
+ }
+
+ void vsubsd_mr(XMMRegisterID b, int offset, RegisterID base, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F2, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)b, base, offset);
+ }
+
+ void vsubsd_mr(XMMRegisterID b, int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F2, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)b, offset, base, index, scale);
+ }
+
</ins><span class="cx"> void subss_rr(XMMRegisterID src, XMMRegisterID dst)
</span><span class="cx"> {
</span><span class="cx"> m_formatter.prefix(PRE_SSE_F3);
</span><span class="cx"> m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)src);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void vsubss_rr(XMMRegisterID a, XMMRegisterID b, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F3, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)a, (RegisterID)b);
+ }
+
</ins><span class="cx"> void subss_mr(int offset, RegisterID base, XMMRegisterID dst)
</span><span class="cx"> {
</span><span class="cx"> m_formatter.prefix(PRE_SSE_F3);
</span><span class="cx"> m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, (RegisterID)dst, base, offset);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void subss_mr(int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+ {
+ m_formatter.prefix(PRE_SSE_F3);
+ m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, dst, base, index, scale, offset);
+ }
+
+ void vsubss_mr(XMMRegisterID b, int offset, RegisterID base, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F3, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)b, base, offset);
+ }
+
+ void vsubss_mr(XMMRegisterID b, int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+ {
+ m_formatter.vexNdsLigWigTwoByteOp(PRE_SSE_F3, OP2_SUBSD_VsdWsd, (RegisterID)dst, (RegisterID)b, offset, base, index, scale);
+ }
+
</ins><span class="cx"> void ucomisd_rr(XMMRegisterID src, XMMRegisterID dst)
</span><span class="cx"> {
</span><span class="cx"> m_formatter.prefix(PRE_SSE_66);
</span><span class="lines">@@ -3339,15 +3381,10 @@
</span><span class="cx"> writer.memoryModRM(reg, address);
</span><span class="cx"> }
</span><span class="cx"> #endif
</span><del>- void vexNdsLigWigCommutativeTwoByteOp(OneByteOpcodeID simdPrefix, TwoByteOpcodeID opcode, RegisterID dest, RegisterID a, RegisterID b)
</del><ins>+ void vexNdsLigWigTwoByteOp(OneByteOpcodeID simdPrefix, TwoByteOpcodeID opcode, RegisterID dest, RegisterID a, RegisterID b)
</ins><span class="cx"> {
</span><span class="cx"> SingleInstructionBufferWriter writer(m_buffer);
</span><del>-
- // Since this is a commutative operation, we can try switching the arguments.
</del><span class="cx"> if (regRequiresRex(b))
</span><del>- std::swap(a, b);
-
- if (regRequiresRex(b))
</del><span class="cx"> writer.threeBytesVexNds(simdPrefix, VexImpliedBytes::TwoBytesOp, dest, a, b);
</span><span class="cx"> else
</span><span class="cx"> writer.twoBytesVex(simdPrefix, a, dest);
</span><span class="lines">@@ -3355,6 +3392,14 @@
</span><span class="cx"> writer.registerModRM(dest, b);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void vexNdsLigWigCommutativeTwoByteOp(OneByteOpcodeID simdPrefix, TwoByteOpcodeID opcode, RegisterID dest, RegisterID a, RegisterID b)
+ {
+ // Since this is a commutative operation, we can try switching the arguments.
+ if (regRequiresRex(b))
+ std::swap(a, b);
+ vexNdsLigWigTwoByteOp(simdPrefix, opcode, dest, a, b);
+ }
+
</ins><span class="cx"> void vexNdsLigWigTwoByteOp(OneByteOpcodeID simdPrefix, TwoByteOpcodeID opcode, RegisterID dest, RegisterID a, RegisterID base, int offset)
</span><span class="cx"> {
</span><span class="cx"> SingleInstructionBufferWriter writer(m_buffer);
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3airAirOpcodeopcodes"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes (198952 => 198953)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes 2016-04-01 19:15:05 UTC (rev 198952)
+++ trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes 2016-04-01 19:20:08 UTC (rev 198953)
</span><span class="lines">@@ -177,15 +177,19 @@
</span><span class="cx"> x86: Addr, Tmp
</span><span class="cx"> x86: Tmp, Addr
</span><span class="cx">
</span><del>-arm64: SubDouble U:F:64, U:F:64, D:F:64
- Tmp, Tmp, Tmp
</del><ins>+SubDouble U:F:64, U:F:64, D:F:64
+ arm64: Tmp, Tmp, Tmp
+ x86: Tmp, Addr, Tmp
+ x86: Tmp, Index, Tmp
</ins><span class="cx">
</span><span class="cx"> x86: SubDouble U:F:64, UD:F:64
</span><span class="cx"> Tmp, Tmp
</span><span class="cx"> Addr, Tmp
</span><span class="cx">
</span><del>-arm64: SubFloat U:F:32, U:F:32, D:F:32
- Tmp, Tmp, Tmp
</del><ins>+SubFloat U:F:32, U:F:32, D:F:32
+ arm64: Tmp, Tmp, Tmp
+ x86: Tmp, Addr, Tmp
+ x86: Tmp, Index, Tmp
</ins><span class="cx">
</span><span class="cx"> x86: SubFloat U:F:32, UD:F:32
</span><span class="cx"> Tmp, Tmp
</span></span></pre>
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