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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/196926">196926</a></dd>
<dt>Author</dt> <dd>carlosgc@webkit.org</dd>
<dt>Date</dt> <dd>2016-02-22 02:31:11 -0800 (Mon, 22 Feb 2016)</dd>
</dl>
<h3>Log Message</h3>
<pre>Merge <a href="http://trac.webkit.org/projects/webkit/changeset/196591">r196591</a> - [ARMv7] stress/op_rshift.js and stress/op_urshift.js are failing.
https://bugs.webkit.org/show_bug.cgi?id=151514
Reviewed by Filip Pizlo.
The issue turns out to be trivial: on ARMv7 (and traditional ARM too), arithmetic
shift right (ASR) and logical shift right (LSR) takes an immediate shift amount
from 1-32. See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/Cjacbgca.html.
An immediate shift amount of 0 is interpreted as a shift of 32 bits.
Meanwhile, our macro assembler is expecting the immediate shift value to be
between 0-31. As a result, a shift amount of 0 is being wrongly encoded with 0
bits which means shift right by 32 bits.
The fix is to check if the shift amount is 0, and if so, emit a move. Else,
emit the right shift as usual.
This issue does not affect left shifts, as the immediate shift amount for left
shifts is between 0-31 as our macro assembler expects.
* assembler/MacroAssemblerARM.h:
(JSC::MacroAssemblerARM::rshift32):
(JSC::MacroAssemblerARM::urshift32):
(JSC::MacroAssemblerARM::sub32):
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::rshift32):
(JSC::MacroAssemblerARMv7::urshift32):
* tests/stress/op_rshift.js:
* tests/stress/op_urshift.js:
- Un-skip these tests. They should always pass now.</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#releasesWebKitGTKwebkit210SourceJavaScriptCoreChangeLog">releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#releasesWebKitGTKwebkit210SourceJavaScriptCoreassemblerMacroAssemblerARMh">releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARM.h</a></li>
<li><a href="#releasesWebKitGTKwebkit210SourceJavaScriptCoreassemblerMacroAssemblerARMv7h">releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="releasesWebKitGTKwebkit210SourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/ChangeLog (196925 => 196926)</h4>
<pre class="diff"><span>
<span class="info">--- releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/ChangeLog 2016-02-22 10:29:05 UTC (rev 196925)
+++ releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/ChangeLog 2016-02-22 10:31:11 UTC (rev 196926)
</span><span class="lines">@@ -1,3 +1,37 @@
</span><ins>+2016-02-15 Mark Lam <mark.lam@apple.com>
+
+ [ARMv7] stress/op_rshift.js and stress/op_urshift.js are failing.
+ https://bugs.webkit.org/show_bug.cgi?id=151514
+
+ Reviewed by Filip Pizlo.
+
+ The issue turns out to be trivial: on ARMv7 (and traditional ARM too), arithmetic
+ shift right (ASR) and logical shift right (LSR) takes an immediate shift amount
+ from 1-32. See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/Cjacbgca.html.
+ An immediate shift amount of 0 is interpreted as a shift of 32 bits.
+
+ Meanwhile, our macro assembler is expecting the immediate shift value to be
+ between 0-31. As a result, a shift amount of 0 is being wrongly encoded with 0
+ bits which means shift right by 32 bits.
+
+ The fix is to check if the shift amount is 0, and if so, emit a move. Else,
+ emit the right shift as usual.
+
+ This issue does not affect left shifts, as the immediate shift amount for left
+ shifts is between 0-31 as our macro assembler expects.
+
+ * assembler/MacroAssemblerARM.h:
+ (JSC::MacroAssemblerARM::rshift32):
+ (JSC::MacroAssemblerARM::urshift32):
+ (JSC::MacroAssemblerARM::sub32):
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::rshift32):
+ (JSC::MacroAssemblerARMv7::urshift32):
+
+ * tests/stress/op_rshift.js:
+ * tests/stress/op_urshift.js:
+ - Un-skip these tests. They should always pass now.
+
</ins><span class="cx"> 2016-02-15 Filip Pizlo <fpizlo@apple.com>
</span><span class="cx">
</span><span class="cx"> Parser::parseVariableDeclarationList should null check the node before attempting to create a new CommaExpr
</span></span></pre></div>
<a id="releasesWebKitGTKwebkit210SourceJavaScriptCoreassemblerMacroAssemblerARMh"></a>
<div class="modfile"><h4>Modified: releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARM.h (196925 => 196926)</h4>
<pre class="diff"><span>
<span class="info">--- releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARM.h 2016-02-22 10:29:05 UTC (rev 196925)
+++ releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARM.h 2016-02-22 10:31:11 UTC (rev 196926)
</span><span class="lines">@@ -263,7 +263,10 @@
</span><span class="cx">
</span><span class="cx"> void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
</span><span class="cx"> {
</span><del>- m_assembler.movs(dest, m_assembler.asr(src, imm.m_value & 0x1f));
</del><ins>+ if (!imm.m_value)
+ move(src, dest);
+ else
+ m_assembler.movs(dest, m_assembler.asr(src, imm.m_value & 0x1f));
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void urshift32(RegisterID shiftAmount, RegisterID dest)
</span><span class="lines">@@ -286,7 +289,10 @@
</span><span class="cx">
</span><span class="cx"> void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
</span><span class="cx"> {
</span><del>- m_assembler.movs(dest, m_assembler.lsr(src, imm.m_value & 0x1f));
</del><ins>+ if (!imm.m_value)
+ move(src, dest);
+ else
+ m_assembler.movs(dest, m_assembler.lsr(src, imm.m_value & 0x1f));
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void sub32(RegisterID src, RegisterID dest)
</span></span></pre></div>
<a id="releasesWebKitGTKwebkit210SourceJavaScriptCoreassemblerMacroAssemblerARMv7h"></a>
<div class="modfile"><h4>Modified: releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h (196925 => 196926)</h4>
<pre class="diff"><span>
<span class="info">--- releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h 2016-02-22 10:29:05 UTC (rev 196925)
+++ releases/WebKitGTK/webkit-2.10/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h 2016-02-22 10:31:11 UTC (rev 196926)
</span><span class="lines">@@ -381,7 +381,10 @@
</span><span class="cx">
</span><span class="cx"> void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
</span><span class="cx"> {
</span><del>- m_assembler.asr(dest, src, imm.m_value & 0x1f);
</del><ins>+ if (!imm.m_value)
+ move(src, dest);
+ else
+ m_assembler.asr(dest, src, imm.m_value & 0x1f);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void rshift32(RegisterID shiftAmount, RegisterID dest)
</span><span class="lines">@@ -406,7 +409,10 @@
</span><span class="cx">
</span><span class="cx"> void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
</span><span class="cx"> {
</span><del>- m_assembler.lsr(dest, src, imm.m_value & 0x1f);
</del><ins>+ if (!imm.m_value)
+ move(src, dest);
+ else
+ m_assembler.lsr(dest, src, imm.m_value & 0x1f);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> void urshift32(RegisterID shiftAmount, RegisterID dest)
</span></span></pre>
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