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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/194354">194354</a></dd>
<dt>Author</dt> <dd>fpizlo@apple.com</dd>
<dt>Date</dt> <dd>2015-12-21 15:40:36 -0800 (Mon, 21 Dec 2015)</dd>
</dl>
<h3>Log Message</h3>
<pre>B3 should be able to compile Store16
https://bugs.webkit.org/show_bug.cgi?id=152493
Reviewed by Saam Barati.
This adds comprehensive Store16 support to our assembler, Air, and B3->Air lowering.
* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::store16):
* assembler/X86Assembler.h:
(JSC::X86Assembler::movb_rm):
(JSC::X86Assembler::movw_rm):
* b3/B3LowerToAir.cpp:
(JSC::B3::Air::LowerToAir::lower):
* b3/air/AirOpcode.opcodes:
* b3/testb3.cpp:
(JSC::B3::testStorePartial8BitRegisterOnX86):
(JSC::B3::testStore16Arg):
(JSC::B3::testStore16Imm):
(JSC::B3::testTrunc):
(JSC::B3::run):</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerMacroAssemblerX86Commonh">trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerX86Assemblerh">trunk/Source/JavaScriptCore/assembler/X86Assembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3B3LowerToAircpp">trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3airAirOpcodeopcodes">trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes</a></li>
<li><a href="#trunkSourceJavaScriptCoreb3testb3cpp">trunk/Source/JavaScriptCore/b3/testb3.cpp</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/ChangeLog 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -1,5 +1,29 @@
</span><span class="cx"> 2015-12-21 Filip Pizlo <fpizlo@apple.com>
</span><span class="cx">
</span><ins>+ B3 should be able to compile Store16
+ https://bugs.webkit.org/show_bug.cgi?id=152493
+
+ Reviewed by Saam Barati.
+
+ This adds comprehensive Store16 support to our assembler, Air, and B3->Air lowering.
+
+ * assembler/MacroAssemblerX86Common.h:
+ (JSC::MacroAssemblerX86Common::store16):
+ * assembler/X86Assembler.h:
+ (JSC::X86Assembler::movb_rm):
+ (JSC::X86Assembler::movw_rm):
+ * b3/B3LowerToAir.cpp:
+ (JSC::B3::Air::LowerToAir::lower):
+ * b3/air/AirOpcode.opcodes:
+ * b3/testb3.cpp:
+ (JSC::B3::testStorePartial8BitRegisterOnX86):
+ (JSC::B3::testStore16Arg):
+ (JSC::B3::testStore16Imm):
+ (JSC::B3::testTrunc):
+ (JSC::B3::run):
+
+2015-12-21 Filip Pizlo <fpizlo@apple.com>
+
</ins><span class="cx"> Unreviewed, remove highBitsAreZero(), it's unused.
</span><span class="cx">
</span><span class="cx"> * b3/B3LowerToAir.cpp:
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerMacroAssemblerX86Commonh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -821,7 +821,26 @@
</span><span class="cx"> m_assembler.movw_rm(src, address.offset, address.base, address.index, address.scale);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void store16(RegisterID src, Address address)
+ {
+#if CPU(X86)
+ // On 32-bit x86 we can only store from the first 4 registers;
+ // esp..edi are mapped to the 'h' registers!
+ if (src >= 4) {
+ // Pick a temporary register.
+ RegisterID temp = getUnusedRegister(address);
</ins><span class="cx">
</span><ins>+ // Swap to the temporary register to perform the store.
+ swap(src, temp);
+ m_assembler.movw_rm(temp, address.offset, address.base);
+ swap(src, temp);
+ return;
+ }
+#endif
+ m_assembler.movw_rm(src, address.offset, address.base);
+ }
+
+
</ins><span class="cx"> // Floating-point operation:
</span><span class="cx"> //
</span><span class="cx"> // Presently only supports SSE, not x87 floating point.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerX86Assemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/X86Assembler.h (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/X86Assembler.h 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/assembler/X86Assembler.h 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -1550,6 +1550,12 @@
</span><span class="cx"> m_formatter.oneByteOp8(OP_MOV_EbGb, src, base, index, scale, offset);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void movw_rm(RegisterID src, int offset, RegisterID base)
+ {
+ m_formatter.prefix(PRE_OPERAND_SIZE);
+ m_formatter.oneByteOp8(OP_MOV_EvGv, src, base, offset);
+ }
+
</ins><span class="cx"> void movw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
</span><span class="cx"> {
</span><span class="cx"> m_formatter.prefix(PRE_OPERAND_SIZE);
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3B3LowerToAircpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/b3/B3LowerToAir.cpp 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -1729,6 +1729,12 @@
</span><span class="cx"> return;
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ case B3::Store16: {
+ Value* valueToStore = m_value->child(0);
+ m_insts.last().append(createStore(Air::Store16, valueToStore, addr(m_value)));
+ return;
+ }
+
</ins><span class="cx"> case Trunc: {
</span><span class="cx"> ASSERT(tmp(m_value->child(0)) == tmp(m_value));
</span><span class="cx"> return;
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3airAirOpcodeopcodes"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/b3/air/AirOpcode.opcodes 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -422,6 +422,10 @@
</span><span class="cx"> Addr, Tmp
</span><span class="cx"> Index, Tmp
</span><span class="cx">
</span><ins>+Store16 U:G:16, D:G:16
+ Tmp, Index
+ Tmp, Addr
+
</ins><span class="cx"> Compare32 U:G:32, U:G:32, U:G:32, ZD:G:32
</span><span class="cx"> RelCond, Tmp, Tmp, Tmp
</span><span class="cx"> RelCond, Tmp, Imm, Tmp
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreb3testb3cpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/b3/testb3.cpp (194353 => 194354)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/b3/testb3.cpp 2015-12-21 23:32:57 UTC (rev 194353)
+++ trunk/Source/JavaScriptCore/b3/testb3.cpp 2015-12-21 23:40:36 UTC (rev 194354)
</span><span class="lines">@@ -4044,6 +4044,84 @@
</span><span class="cx"> CHECK(!storage);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+void testStore16Arg()
+{
+ { // Direct addressing.
+ Procedure proc;
+ BasicBlock* root = proc.addBlock();
+
+ Value* value = root->appendNew<Value>(proc, Trunc, Origin(),
+ root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0));
+ Value* address = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+
+ root->appendNew<MemoryValue>(proc, Store16, Origin(), value, address);
+ root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+ int16_t storage = -1;
+ CHECK(compileAndRun<int64_t>(proc, 42, &storage) == 42);
+ CHECK(storage == 42);
+ }
+
+ { // Indexed addressing.
+ Procedure proc;
+ BasicBlock* root = proc.addBlock();
+
+ Value* value = root->appendNew<Value>(proc, Trunc, Origin(),
+ root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0));
+ Value* base = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+ Value* offset = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR2);
+ Value* displacement = root->appendNew<Const64Value>(proc, Origin(), -1);
+
+ Value* baseDisplacement = root->appendNew<Value>(proc, Add, Origin(), displacement, base);
+ Value* address = root->appendNew<Value>(proc, Add, Origin(), baseDisplacement, offset);
+
+ root->appendNew<MemoryValue>(proc, Store16, Origin(), value, address);
+ root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+ int8_t storage = -1;
+ CHECK(compileAndRun<int64_t>(proc, 42, &storage, 1) == 42);
+ CHECK(storage == 42);
+ }
+}
+
+void testStore16Imm()
+{
+ { // Direct addressing.
+ Procedure proc;
+ BasicBlock* root = proc.addBlock();
+
+ Value* value = root->appendNew<Const32Value>(proc, Origin(), 42);
+ Value* address = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+
+ root->appendNew<MemoryValue>(proc, Store16, Origin(), value, address);
+ root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+ int16_t storage = -1;
+ CHECK(compileAndRun<int64_t>(proc, &storage) == 42);
+ CHECK(storage == 42);
+ }
+
+ { // Indexed addressing.
+ Procedure proc;
+ BasicBlock* root = proc.addBlock();
+
+ Value* value = root->appendNew<Const32Value>(proc, Origin(), 42);
+ Value* base = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR0);
+ Value* offset = root->appendNew<ArgumentRegValue>(proc, Origin(), GPRInfo::argumentGPR1);
+ Value* displacement = root->appendNew<Const64Value>(proc, Origin(), -1);
+
+ Value* baseDisplacement = root->appendNew<Value>(proc, Add, Origin(), displacement, base);
+ Value* address = root->appendNew<Value>(proc, Add, Origin(), baseDisplacement, offset);
+
+ root->appendNew<MemoryValue>(proc, Store16, Origin(), value, address);
+ root->appendNew<ControlValue>(proc, Return, Origin(), value);
+
+ int16_t storage = -1;
+ CHECK(compileAndRun<int64_t>(proc, &storage, 1) == 42);
+ CHECK(storage == 42);
+ }
+}
+
</ins><span class="cx"> void testTrunc(int64_t value)
</span><span class="cx"> {
</span><span class="cx"> Procedure proc;
</span><span class="lines">@@ -9437,6 +9515,8 @@
</span><span class="cx"> RUN(testStore8Arg());
</span><span class="cx"> RUN(testStore8Imm());
</span><span class="cx"> RUN(testStorePartial8BitRegisterOnX86());
</span><ins>+ RUN(testStore16Arg());
+ RUN(testStore16Imm());
</ins><span class="cx"> RUN(testTrunc((static_cast<int64_t>(1) << 40) + 42));
</span><span class="cx"> RUN(testAdd1(45));
</span><span class="cx"> RUN(testAdd1Ptr(51));
</span></span></pre>
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