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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/188149">188149</a></dd>
<dt>Author</dt> <dd>msaboff@apple.com</dd>
<dt>Date</dt> <dd>2015-08-07 13:06:24 -0700 (Fri, 07 Aug 2015)</dd>
</dl>
<h3>Log Message</h3>
<pre>Unreviewed. Rollout <a href="http://trac.webkit.org/projects/webkit/changeset/188072">r188072</a> as there are crashes with release builds.
The combination of <a href="http://trac.webkit.org/projects/webkit/changeset/188071">r188071</a> and <a href="http://trac.webkit.org/projects/webkit/changeset/188072">r188072</a> does not properly restore all registers for
all exceptions. Rolling out to make the branch functional again.
* llint/LowLevelInterpreter.asm:
* llint/LowLevelInterpreter64.asm:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#branchesjsctailcallSourceJavaScriptCoreChangeLog">branches/jsc-tailcall/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#branchesjsctailcallSourceJavaScriptCorellintLowLevelInterpreterasm">branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter.asm</a></li>
<li><a href="#branchesjsctailcallSourceJavaScriptCorellintLowLevelInterpreter64asm">branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter64.asm</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="branchesjsctailcallSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: branches/jsc-tailcall/Source/JavaScriptCore/ChangeLog (188148 => 188149)</h4>
<pre class="diff"><span>
<span class="info">--- branches/jsc-tailcall/Source/JavaScriptCore/ChangeLog 2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/JavaScriptCore/ChangeLog 2015-08-07 20:06:24 UTC (rev 188149)
</span><span class="lines">@@ -1,3 +1,13 @@
</span><ins>+2015-08-07 Michael Saboff <msaboff@apple.com>
+
+ Unreviewed. Rollout r188072 as there are crashes with release builds.
+
+ The combination of r188071 and r188072 does not properly restore all registers for
+ all exceptions. Rolling out to make the branch functional again.
+
+ * llint/LowLevelInterpreter.asm:
+ * llint/LowLevelInterpreter64.asm:
+
</ins><span class="cx"> 2015-08-06 Michael Saboff <msaboff@apple.com>
</span><span class="cx">
</span><span class="cx"> jsc-tailcall: Stop saving and restoring all callee saves on vmEntry / exit for platforms with per function callee saves handling
</span></span></pre></div>
<a id="branchesjsctailcallSourceJavaScriptCorellintLowLevelInterpreterasm"></a>
<div class="modfile"><h4>Modified: branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter.asm (188148 => 188149)</h4>
<pre class="diff"><span>
<span class="info">--- branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter.asm 2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter.asm 2015-08-07 20:06:24 UTC (rev 188149)
</span><span class="lines">@@ -397,15 +397,18 @@
</span><span class="cx"> end
</span><span class="cx"> end
</span><span class="cx">
</span><del>-# ARM64 and the X86 64 bit platforms properly save and restore callee saves in each function.
-if C_LOOP or ARM64 or X86_64 or X86_64_WIN
</del><ins>+if C_LOOP
</ins><span class="cx"> const CalleeSaveRegisterCount = 0
</span><span class="cx"> elsif ARM or ARMv7_TRADITIONAL or ARMv7
</span><span class="cx"> const CalleeSaveRegisterCount = 7
</span><del>-elsif SH4 or MIPS
</del><ins>+elsif ARM64
+ const CalleeSaveRegisterCount = 10
+elsif SH4 or X86_64 or MIPS
</ins><span class="cx"> const CalleeSaveRegisterCount = 5
</span><span class="cx"> elsif X86 or X86_WIN
</span><span class="cx"> const CalleeSaveRegisterCount = 3
</span><ins>+elsif X86_64_WIN
+ const CalleeSaveRegisterCount = 7
</ins><span class="cx"> end
</span><span class="cx">
</span><span class="cx"> const CalleeRegisterSaveSize = CalleeSaveRegisterCount * PtrSize
</span><span class="lines">@@ -415,11 +418,17 @@
</span><span class="cx"> const VMEntryTotalFrameSize = (CalleeRegisterSaveSize + sizeof VMEntryRecord + StackAlignment - 1) & ~StackAlignmentMask
</span><span class="cx">
</span><span class="cx"> macro pushCalleeSaves()
</span><del>- if C_LOOP or ARM64 or X86_64 or X86_64_WIN
</del><ins>+ if C_LOOP
</ins><span class="cx"> elsif ARM or ARMv7_TRADITIONAL
</span><span class="cx"> emit "push {r4-r10}"
</span><span class="cx"> elsif ARMv7
</span><span class="cx"> emit "push {r4-r6, r8-r11}"
</span><ins>+ elsif ARM64
+ emit "stp x20, x19, [sp, #-16]!"
+ emit "stp x22, x21, [sp, #-16]!"
+ emit "stp x24, x23, [sp, #-16]!"
+ emit "stp x26, x25, [sp, #-16]!"
+ emit "stp x28, x27, [sp, #-16]!"
</ins><span class="cx"> elsif MIPS
</span><span class="cx"> emit "addiu $sp, $sp, -20"
</span><span class="cx"> emit "sw $20, 16($sp)"
</span><span class="lines">@@ -441,15 +450,35 @@
</span><span class="cx"> emit "push esi"
</span><span class="cx"> emit "push edi"
</span><span class="cx"> emit "push ebx"
</span><ins>+ elsif X86_64
+ emit "push %r12"
+ emit "push %r13"
+ emit "push %r14"
+ emit "push %r15"
+ emit "push %rbx"
+ elsif X86_64_WIN
+ emit "push r12"
+ emit "push r13"
+ emit "push r14"
+ emit "push r15"
+ emit "push rbx"
+ emit "push rdi"
+ emit "push rsi"
</ins><span class="cx"> end
</span><span class="cx"> end
</span><span class="cx">
</span><span class="cx"> macro popCalleeSaves()
</span><del>- if C_LOOP or ARM64 or X86_64 or X86_64_WIN
</del><ins>+ if C_LOOP
</ins><span class="cx"> elsif ARM or ARMv7_TRADITIONAL
</span><span class="cx"> emit "pop {r4-r10}"
</span><span class="cx"> elsif ARMv7
</span><span class="cx"> emit "pop {r4-r6, r8-r11}"
</span><ins>+ elsif ARM64
+ emit "ldp x28, x27, [sp], #16"
+ emit "ldp x26, x25, [sp], #16"
+ emit "ldp x24, x23, [sp], #16"
+ emit "ldp x22, x21, [sp], #16"
+ emit "ldp x20, x19, [sp], #16"
</ins><span class="cx"> elsif MIPS
</span><span class="cx"> emit "lw $16, 0($sp)"
</span><span class="cx"> emit "lw $17, 4($sp)"
</span><span class="lines">@@ -471,6 +500,20 @@
</span><span class="cx"> emit "pop ebx"
</span><span class="cx"> emit "pop edi"
</span><span class="cx"> emit "pop esi"
</span><ins>+ elsif X86_64
+ emit "pop %rbx"
+ emit "pop %r15"
+ emit "pop %r14"
+ emit "pop %r13"
+ emit "pop %r12"
+ elsif X86_64_WIN
+ emit "pop rsi"
+ emit "pop rdi"
+ emit "pop rbx"
+ emit "pop r15"
+ emit "pop r14"
+ emit "pop r13"
+ emit "pop r12"
</ins><span class="cx"> end
</span><span class="cx"> end
</span><span class="cx">
</span><span class="lines">@@ -516,9 +559,10 @@
</span><span class="cx"> storep csr3, -16[cfr]
</span><span class="cx"> storep csr0, -24[cfr]
</span><span class="cx"> elsif X86_64_WIN
</span><del>- storep csr6, -8[cfr]
- storep csr5, -16[cfr]
- storep csr0, -24[cfr]
</del><ins>+ storep t4, -8[cfr]
+ storep csr6, -16[cfr]
+ storep csr5, -24[cfr]
+ storep csr0, -32[cfr]
</ins><span class="cx"> end
</span><span class="cx"> end
</span><span class="cx">
</span></span></pre></div>
<a id="branchesjsctailcallSourceJavaScriptCorellintLowLevelInterpreter64asm"></a>
<div class="modfile"><h4>Modified: branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter64.asm (188148 => 188149)</h4>
<pre class="diff"><span>
<span class="info">--- branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter64.asm 2015-08-07 19:40:45 UTC (rev 188148)
+++ branches/jsc-tailcall/Source/JavaScriptCore/llint/LowLevelInterpreter64.asm 2015-08-07 20:06:24 UTC (rev 188149)
</span><span class="lines">@@ -215,6 +215,9 @@
</span><span class="cx"> end
</span><span class="cx"> storep cfr, VM::topVMEntryFrame[vm]
</span><span class="cx">
</span><ins>+ move TagTypeNumber, tagTypeNumber
+ addp TagBitTypeOther, tagTypeNumber, tagMask
+
</ins><span class="cx"> checkStackPointerAlignment(extraTempReg, 0xbad0dc02)
</span><span class="cx">
</span><span class="cx"> makeCall(entry, t3)
</span></span></pre>
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