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<div id="msg">
<dl class="meta">
<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/181570">181570</a></dd>
<dt>Author</dt> <dd>ossy@webkit.org</dd>
<dt>Date</dt> <dd>2015-03-16 11:44:46 -0700 (Mon, 16 Mar 2015)</dd>
</dl>

<h3>Log Message</h3>
<pre>[ARM] Enable generating idiv instructions if it is supported
https://bugs.webkit.org/show_bug.cgi?id=142725

Reviewed by Michael Saboff.

Source/JavaScriptCore:

* assembler/ARMAssembler.h: Added sdiv and udiv implementation for ARM Traditional instruction set.
(JSC::ARMAssembler::sdiv):
(JSC::ARMAssembler::udiv):
* assembler/ARMv7Assembler.h: Use HAVE(ARM_IDIV_INSTRUCTIONS) instead of CPU(APPLE_ARMV7S).
* assembler/AbstractMacroAssembler.h:
(JSC::isARMv7IDIVSupported):
(JSC::optimizeForARMv7IDIVSupported):
(JSC::isARMv7s): Renamed to isARMv7IDIVSupported().
(JSC::optimizeForARMv7s): Renamed to optimizeForARMv7IDIVSupported().
* dfg/DFGFixupPhase.cpp:
(JSC::DFG::FixupPhase::fixupNode):
* dfg/DFGSpeculativeJIT.cpp:
(JSC::DFG::SpeculativeJIT::compileArithDiv):
(JSC::DFG::SpeculativeJIT::compileArithMod):

Source/WTF:

* wtf/Platform.h: Set HAVE_ARM_IDIV_INSTRUCTIONS based on GCC macro too.</pre>

<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerARMAssemblerh">trunk/Source/JavaScriptCore/assembler/ARMAssembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerARMv7Assemblerh">trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerAbstractMacroAssemblerh">trunk/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoredfgDFGFixupPhasecpp">trunk/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoredfgDFGSpeculativeJITcpp">trunk/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp</a></li>
<li><a href="#trunkSourceWTFChangeLog">trunk/Source/WTF/ChangeLog</a></li>
<li><a href="#trunkSourceWTFwtfPlatformh">trunk/Source/WTF/wtf/Platform.h</a></li>
</ul>

</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/ChangeLog        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -1,3 +1,25 @@
</span><ins>+2015-03-16  Csaba Osztrogonác  &lt;ossy@webkit.org&gt;
+
+        [ARM] Enable generating idiv instructions if it is supported
+        https://bugs.webkit.org/show_bug.cgi?id=142725
+
+        Reviewed by Michael Saboff.
+
+        * assembler/ARMAssembler.h: Added sdiv and udiv implementation for ARM Traditional instruction set.
+        (JSC::ARMAssembler::sdiv):
+        (JSC::ARMAssembler::udiv):
+        * assembler/ARMv7Assembler.h: Use HAVE(ARM_IDIV_INSTRUCTIONS) instead of CPU(APPLE_ARMV7S).
+        * assembler/AbstractMacroAssembler.h:
+        (JSC::isARMv7IDIVSupported):
+        (JSC::optimizeForARMv7IDIVSupported):
+        (JSC::isARMv7s): Renamed to isARMv7IDIVSupported().
+        (JSC::optimizeForARMv7s): Renamed to optimizeForARMv7IDIVSupported().
+        * dfg/DFGFixupPhase.cpp:
+        (JSC::DFG::FixupPhase::fixupNode):
+        * dfg/DFGSpeculativeJIT.cpp:
+        (JSC::DFG::SpeculativeJIT::compileArithDiv):
+        (JSC::DFG::SpeculativeJIT::compileArithMod):
+
</ins><span class="cx"> 2015-03-15  Filip Pizlo  &lt;fpizlo@apple.com&gt;
</span><span class="cx"> 
</span><span class="cx">         DFG::PutStackSinkingPhase should eliminate GetStacks that have an obviously known source, and emit GetStacks when the stack's value is needed and none is deferred
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerARMAssemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/ARMAssembler.h (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/ARMAssembler.h        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/assembler/ARMAssembler.h        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -216,6 +216,10 @@
</span><span class="cx"> #endif
</span><span class="cx">             NOP = 0xe1a00000,
</span><span class="cx">             DMB_SY = 0xf57ff05f,
</span><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
+            SDIV = 0x0710f010,
+            UDIV = 0x0730f010,
+#endif
</ins><span class="cx">         };
</span><span class="cx"> 
</span><span class="cx">         enum {
</span><span class="lines">@@ -477,6 +481,26 @@
</span><span class="cx">             m_buffer.putInt(toARMWord(cc) | MULL | RN(rdhi) | RD(rdlo) | RS(rn) | RM(rm));
</span><span class="cx">         }
</span><span class="cx"> 
</span><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
+        template&lt;int datasize&gt;
+        void sdiv(int rd, int rn, int rm, Condition cc = AL)
+        {
+            static_assert(datasize == 32, &quot;sdiv datasize must be 32 for armv7s&quot;);
+            ASSERT(rd != ARMRegisters::pc);
+            ASSERT(rn != ARMRegisters::pc);
+            ASSERT(rm != ARMRegisters::pc);
+            m_buffer.putInt(toARMWord(cc) | SDIV | RN(rd) | RM(rn) | RS(rm));
+        }
+
+        void udiv(int rd, int rn, int rm, Condition cc = AL)
+        {
+            ASSERT(rd != ARMRegisters::pc);
+            ASSERT(rn != ARMRegisters::pc);
+            ASSERT(rm != ARMRegisters::pc);
+            m_buffer.putInt(toARMWord(cc) | UDIV | RN(rd) | RM(rn) | RS(rm));
+        }
+#endif
+
</ins><span class="cx">         void vmov_f64(int dd, int dm, Condition cc = AL)
</span><span class="cx">         {
</span><span class="cx">             emitDoublePrecisionInstruction(toARMWord(cc) | VMOV_F64, dd, 0, dm);
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerARMv7Assemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/assembler/ARMv7Assembler.h        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -708,7 +708,7 @@
</span><span class="cx">         OP_ROR_reg_T2   = 0xFA60,
</span><span class="cx">         OP_CLZ          = 0xFAB0,
</span><span class="cx">         OP_SMULL_T1     = 0xFB80,
</span><del>-#if CPU(APPLE_ARMV7S)
</del><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
</ins><span class="cx">         OP_SDIV_T1      = 0xFB90,
</span><span class="cx">         OP_UDIV_T1      = 0xFBB0,
</span><span class="cx"> #endif
</span><span class="lines">@@ -1499,7 +1499,7 @@
</span><span class="cx">         m_formatter.twoWordOp16Imm16(OP_PUSH_T2, registerList);
</span><span class="cx">     }
</span><span class="cx"> 
</span><del>-#if CPU(APPLE_ARMV7S)
</del><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
</ins><span class="cx">     template&lt;int datasize&gt;
</span><span class="cx">     ALWAYS_INLINE void sdiv(RegisterID rd, RegisterID rn, RegisterID rm)
</span><span class="cx">     {
</span><span class="lines">@@ -1847,7 +1847,7 @@
</span><span class="cx">         m_formatter.twoWordOp12Reg40Imm3Reg4Imm20Imm5(OP_UBFX_T1, rd, rn, (lsb &amp; 0x1c) &lt;&lt; 10, (lsb &amp; 0x3) &lt;&lt; 6, (width - 1) &amp; 0x1f);
</span><span class="cx">     }
</span><span class="cx"> 
</span><del>-#if CPU(APPLE_ARMV7S)
</del><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
</ins><span class="cx">     ALWAYS_INLINE void udiv(RegisterID rd, RegisterID rn, RegisterID rm)
</span><span class="cx">     {
</span><span class="cx">         ASSERT(!BadReg(rd));
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerAbstractMacroAssemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/assembler/AbstractMacroAssembler.h        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -39,9 +39,9 @@
</span><span class="cx"> 
</span><span class="cx"> namespace JSC {
</span><span class="cx"> 
</span><del>-inline bool isARMv7s()
</del><ins>+inline bool isARMv7IDIVSupported()
</ins><span class="cx"> {
</span><del>-#if CPU(APPLE_ARMV7S)
</del><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
</ins><span class="cx">     return true;
</span><span class="cx"> #else
</span><span class="cx">     return false;
</span><span class="lines">@@ -66,9 +66,9 @@
</span><span class="cx"> #endif
</span><span class="cx"> }
</span><span class="cx"> 
</span><del>-inline bool optimizeForARMv7s()
</del><ins>+inline bool optimizeForARMv7IDIVSupported()
</ins><span class="cx"> {
</span><del>-    return isARMv7s() &amp;&amp; Options::enableArchitectureSpecificOptimizations();
</del><ins>+    return isARMv7IDIVSupported() &amp;&amp; Options::enableArchitectureSpecificOptimizations();
</ins><span class="cx"> }
</span><span class="cx"> 
</span><span class="cx"> inline bool optimizeForARM64()
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoredfgDFGFixupPhasecpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/dfg/DFGFixupPhase.cpp        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -273,7 +273,7 @@
</span><span class="cx">         case ArithMod: {
</span><span class="cx">             if (Node::shouldSpeculateInt32OrBooleanForArithmetic(node-&gt;child1().node(), node-&gt;child2().node())
</span><span class="cx">                 &amp;&amp; node-&gt;canSpeculateInt32(FixupPass)) {
</span><del>-                if (optimizeForX86() || optimizeForARM64() || optimizeForARMv7s()) {
</del><ins>+                if (optimizeForX86() || optimizeForARM64() || optimizeForARMv7IDIVSupported()) {
</ins><span class="cx">                     fixIntOrBooleanEdge(node-&gt;child1());
</span><span class="cx">                     fixIntOrBooleanEdge(node-&gt;child2());
</span><span class="cx">                     if (bytecodeCanTruncateInteger(node-&gt;arithNodeFlags()))
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoredfgDFGSpeculativeJITcpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -3198,7 +3198,7 @@
</span><span class="cx">         
</span><span class="cx">         done.link(&amp;m_jit);
</span><span class="cx">         int32Result(eax.gpr(), node);
</span><del>-#elif CPU(APPLE_ARMV7S) || CPU(ARM64)
</del><ins>+#elif HAVE(ARM_IDIV_INSTRUCTIONS) || CPU(ARM64)
</ins><span class="cx">         SpeculateInt32Operand op1(this, node-&gt;child1());
</span><span class="cx">         SpeculateInt32Operand op2(this, node-&gt;child2());
</span><span class="cx">         GPRReg op1GPR = op1.gpr();
</span><span class="lines">@@ -3451,7 +3451,7 @@
</span><span class="cx">         done.link(&amp;m_jit);
</span><span class="cx">         int32Result(edx.gpr(), node);
</span><span class="cx"> 
</span><del>-#elif CPU(ARM64) || CPU(APPLE_ARMV7S)
</del><ins>+#elif HAVE(ARM_IDIV_INSTRUCTIONS) || CPU(ARM64)
</ins><span class="cx">         GPRTemporary temp(this);
</span><span class="cx">         GPRTemporary quotientThenRemainder(this);
</span><span class="cx">         GPRTemporary multiplyAnswer(this);
</span><span class="lines">@@ -3476,7 +3476,7 @@
</span><span class="cx">         // arithMode() == Arith::Unchecked?
</span><span class="cx">         // https://bugs.webkit.org/show_bug.cgi?id=126444
</span><span class="cx">         speculationCheck(Overflow, JSValueRegs(), 0, m_jit.branchMul32(JITCompiler::Overflow, quotientThenRemainderGPR, divisorGPR, multiplyAnswerGPR));
</span><del>-#if CPU(APPLE_ARMV7S)
</del><ins>+#if HAVE(ARM_IDIV_INSTRUCTIONS)
</ins><span class="cx">         m_jit.assembler().sub(quotientThenRemainderGPR, dividendGPR, multiplyAnswerGPR);
</span><span class="cx"> #else
</span><span class="cx">         m_jit.assembler().sub&lt;32&gt;(quotientThenRemainderGPR, dividendGPR, multiplyAnswerGPR);
</span></span></pre></div>
<a id="trunkSourceWTFChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/WTF/ChangeLog (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WTF/ChangeLog        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/WTF/ChangeLog        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -1,3 +1,12 @@
</span><ins>+2015-03-16  Csaba Osztrogonác  &lt;ossy@webkit.org&gt;
+
+        [ARM] Enable generating idiv instructions if it is supported
+        https://bugs.webkit.org/show_bug.cgi?id=142725
+
+        Reviewed by Michael Saboff.
+
+        * wtf/Platform.h: Set HAVE_ARM_IDIV_INSTRUCTIONS based on GCC macro too.
+
</ins><span class="cx"> 2015-03-16  Benjamin Poulain  &lt;benjamin@webkit.org&gt;
</span><span class="cx"> 
</span><span class="cx">         Fix StringView after r181525
</span></span></pre></div>
<a id="trunkSourceWTFwtfPlatformh"></a>
<div class="modfile"><h4>Modified: trunk/Source/WTF/wtf/Platform.h (181569 => 181570)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WTF/wtf/Platform.h        2015-03-16 18:30:34 UTC (rev 181569)
+++ trunk/Source/WTF/wtf/Platform.h        2015-03-16 18:44:46 UTC (rev 181570)
</span><span class="lines">@@ -334,6 +334,10 @@
</span><span class="cx"> #define WTF_CPU_APPLE_ARMV7S 1
</span><span class="cx"> #endif
</span><span class="cx"> 
</span><ins>+#if defined(__ARM_ARCH_EXT_IDIV__) || CPU(APPLE_ARMV7S)
+#define HAVE_ARM_IDIV_INSTRUCTIONS 1
+#endif
+
</ins><span class="cx"> #endif /* ARM */
</span><span class="cx"> 
</span><span class="cx"> #if CPU(ARM) || CPU(MIPS) || CPU(SH4)
</span></span></pre>
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