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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/175514">175514</a></dd>
<dt>Author</dt> <dd>commit-queue@webkit.org</dd>
<dt>Date</dt> <dd>2014-11-03 23:36:15 -0800 (Mon, 03 Nov 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>Workaround for Cortex-A53 erratum 835769
https://bugs.webkit.org/show_bug.cgi?id=138315
Patch by Akos Kiss <akiss@inf.u-szeged.hu> on 2014-11-03
Reviewed by Filip Pizlo.
This patch introduces CMake variable and preprocessor macro
WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
.:
code paths, if set true.
* Source/cmake/OptionsCommon.cmake:
Add -mfix-cortex-a53-835769 to the compiler flags if compiler supports
it.
* Source/cmakeconfig.h.cmake:
#cmakedefine01 for WTF_CPU_ARM64_CORTEXA53
Source/JavaScriptCore:
code paths, if set true. The patch also implements one case where such
code paths are needed: the workaround for Cortex-A53 erratum 835769. If
WTF_CPU_ARM64_CORTEXA53 is set then:
- CMake checks whether the compiler already has support for a workaround
and adds -mfix-cortex-a53-835769 to the compiler flags if so,
- the ARM64 backend of offlineasm inserts a nop between memory and
multiply-accumulate instructions, and
- the ARM64 assembler also inserts a nop between memory and (64-bit)
multiply-accumulate instructions.
* assembler/ARM64Assembler.h:
(JSC::ARM64Assembler::madd):
Call nopCortexA53Fix835769() to insert a nop if CPU(ARM64_CORTEXA53) and
if necessary.
(JSC::ARM64Assembler::msub): Likewise.
(JSC::ARM64Assembler::smaddl): Likewise.
(JSC::ARM64Assembler::smsubl): Likewise.
(JSC::ARM64Assembler::umaddl): Likewise.
(JSC::ARM64Assembler::umsubl): Likewise.
(JSC::ARM64Assembler::nopCortexA53Fix835769):
Added. Insert a nop if the previously emitted instruction was a load, a
store, or a prefetch, and if the current instruction is 64-bit.
* offlineasm/arm64.rb:
Add the arm64CortexA53Fix835769 phase and call it from
getModifiedListARM64 to insert nopCortexA53Fix835769 between appropriate
macro instructions. Also, lower nopCortexA53Fix835769 to nop if
CPU(ARM64_CORTEXA53), to nothing otherwise.
* offlineasm/instructions.rb:
Define macro instruction nopFixCortexA53Err835769.</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkChangeLog">trunk/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerARM64Assemblerh">trunk/Source/JavaScriptCore/assembler/ARM64Assembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreofflineasmarm64rb">trunk/Source/JavaScriptCore/offlineasm/arm64.rb</a></li>
<li><a href="#trunkSourceJavaScriptCoreofflineasminstructionsrb">trunk/Source/JavaScriptCore/offlineasm/instructions.rb</a></li>
<li><a href="#trunkSourcecmakeOptionsCommoncmake">trunk/Source/cmake/OptionsCommon.cmake</a></li>
<li><a href="#trunkSourcecmakeconfighcmake">trunk/Source/cmakeconfig.h.cmake</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/ChangeLog (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/ChangeLog 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/ChangeLog 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -1,3 +1,20 @@
</span><ins>+2014-11-03 Akos Kiss <akiss@inf.u-szeged.hu>
+
+ Workaround for Cortex-A53 erratum 835769
+ https://bugs.webkit.org/show_bug.cgi?id=138315
+
+ Reviewed by Filip Pizlo.
+
+ This patch introduces CMake variable and preprocessor macro
+ WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
+ code paths, if set true.
+
+ * Source/cmake/OptionsCommon.cmake:
+ Add -mfix-cortex-a53-835769 to the compiler flags if compiler supports
+ it.
+ * Source/cmakeconfig.h.cmake:
+ #cmakedefine01 for WTF_CPU_ARM64_CORTEXA53
+
</ins><span class="cx"> 2014-11-02 Akos Kiss <akiss@inf.u-szeged.hu>
</span><span class="cx">
</span><span class="cx"> [GTK] Fix the build of FTL JIT
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -1,3 +1,42 @@
</span><ins>+2014-11-03 Akos Kiss <akiss@inf.u-szeged.hu>
+
+ Workaround for Cortex-A53 erratum 835769
+ https://bugs.webkit.org/show_bug.cgi?id=138315
+
+ Reviewed by Filip Pizlo.
+
+ This patch introduces CMake variable and preprocessor macro
+ WTF_CPU_ARM64_CORTEXA53 with the aim of enabling Cortex-A53-specific
+ code paths, if set true. The patch also implements one case where such
+ code paths are needed: the workaround for Cortex-A53 erratum 835769. If
+ WTF_CPU_ARM64_CORTEXA53 is set then:
+ - CMake checks whether the compiler already has support for a workaround
+ and adds -mfix-cortex-a53-835769 to the compiler flags if so,
+ - the ARM64 backend of offlineasm inserts a nop between memory and
+ multiply-accumulate instructions, and
+ - the ARM64 assembler also inserts a nop between memory and (64-bit)
+ multiply-accumulate instructions.
+
+ * assembler/ARM64Assembler.h:
+ (JSC::ARM64Assembler::madd):
+ Call nopCortexA53Fix835769() to insert a nop if CPU(ARM64_CORTEXA53) and
+ if necessary.
+ (JSC::ARM64Assembler::msub): Likewise.
+ (JSC::ARM64Assembler::smaddl): Likewise.
+ (JSC::ARM64Assembler::smsubl): Likewise.
+ (JSC::ARM64Assembler::umaddl): Likewise.
+ (JSC::ARM64Assembler::umsubl): Likewise.
+ (JSC::ARM64Assembler::nopCortexA53Fix835769):
+ Added. Insert a nop if the previously emitted instruction was a load, a
+ store, or a prefetch, and if the current instruction is 64-bit.
+ * offlineasm/arm64.rb:
+ Add the arm64CortexA53Fix835769 phase and call it from
+ getModifiedListARM64 to insert nopCortexA53Fix835769 between appropriate
+ macro instructions. Also, lower nopCortexA53Fix835769 to nop if
+ CPU(ARM64_CORTEXA53), to nothing otherwise.
+ * offlineasm/instructions.rb:
+ Define macro instruction nopFixCortexA53Err835769.
+
</ins><span class="cx"> 2014-11-03 Commit Queue <commit-queue@webkit.org>
</span><span class="cx">
</span><span class="cx"> Unreviewed, rolling out r175509.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerARM64Assemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/ARM64Assembler.h (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/ARM64Assembler.h 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/JavaScriptCore/assembler/ARM64Assembler.h 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -1568,6 +1568,7 @@
</span><span class="cx"> ALWAYS_INLINE void madd(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><span class="cx"> CHECK_DATASIZE();
</span><ins>+ nopCortexA53Fix835769<datasize>();
</ins><span class="cx"> insn(dataProcessing3Source(DATASIZE, DataOp_MADD, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -1620,6 +1621,7 @@
</span><span class="cx"> ALWAYS_INLINE void msub(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><span class="cx"> CHECK_DATASIZE();
</span><ins>+ nopCortexA53Fix835769<datasize>();
</ins><span class="cx"> insn(dataProcessing3Source(DATASIZE, DataOp_MSUB, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -1806,6 +1808,7 @@
</span><span class="cx">
</span><span class="cx"> ALWAYS_INLINE void smaddl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><ins>+ nopCortexA53Fix835769<64>();
</ins><span class="cx"> insn(dataProcessing3Source(Datasize_64, DataOp_SMADDL, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -1816,6 +1819,7 @@
</span><span class="cx">
</span><span class="cx"> ALWAYS_INLINE void smsubl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><ins>+ nopCortexA53Fix835769<64>();
</ins><span class="cx"> insn(dataProcessing3Source(Datasize_64, DataOp_SMSUBL, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -2059,6 +2063,7 @@
</span><span class="cx">
</span><span class="cx"> ALWAYS_INLINE void umaddl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><ins>+ nopCortexA53Fix835769<64>();
</ins><span class="cx"> insn(dataProcessing3Source(Datasize_64, DataOp_UMADDL, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -2069,6 +2074,7 @@
</span><span class="cx">
</span><span class="cx"> ALWAYS_INLINE void umsubl(RegisterID rd, RegisterID rn, RegisterID rm, RegisterID ra)
</span><span class="cx"> {
</span><ins>+ nopCortexA53Fix835769<64>();
</ins><span class="cx"> insn(dataProcessing3Source(Datasize_64, DataOp_UMSUBL, rm, ra, rn, rd));
</span><span class="cx"> }
</span><span class="cx">
</span><span class="lines">@@ -3629,6 +3635,26 @@
</span><span class="cx"> return (0xd6000000 | opc << 21 | op2 << 16 | op3 << 10 | xOrZr(rn) << 5 | op4);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ // Workaround for Cortex-A53 erratum (835769). Emit an extra nop if the
+ // last instruction in the buffer is a load, store or prefetch. Needed
+ // before 64-bit multiply-accumulate instructions.
+ template<int datasize>
+ ALWAYS_INLINE void nopCortexA53Fix835769()
+ {
+#if CPU(ARM64_CORTEXA53)
+ CHECK_DATASIZE();
+ if (datasize == 64) {
+ if (LIKELY(m_buffer.codeSize() >= sizeof(int32_t))) {
+ // From ARMv8 Reference Manual, Section C4.1: the encoding of the
+ // instructions in the Loads and stores instruction group is:
+ // ---- 1-0- ---- ---- ---- ---- ---- ----
+ if (UNLIKELY((*reinterpret_cast_ptr<int32_t*>(reinterpret_cast_ptr<char*>(m_buffer.data()) + m_buffer.codeSize() - sizeof(int32_t)) & 0x0a000000) == 0x08000000))
+ nop();
+ }
+ }
+#endif
+ }
+
</ins><span class="cx"> AssemblerBuffer m_buffer;
</span><span class="cx"> Vector<LinkRecord, 0, UnsafeVectorOverflow> m_jumpsToLink;
</span><span class="cx"> int m_indexOfLastWatchpoint;
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreofflineasmarm64rb"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/offlineasm/arm64.rb (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/offlineasm/arm64.rb 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/JavaScriptCore/offlineasm/arm64.rb 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -228,6 +228,34 @@
</span><span class="cx"> newList
</span><span class="cx"> end
</span><span class="cx">
</span><ins>+# Workaround for Cortex-A53 erratum (835769)
+def arm64CortexA53Fix835769(list)
+ newList = []
+ lastOpcodeUnsafe = false
+
+ list.each {
+ | node |
+ if node.is_a? Instruction
+ case node.opcode
+ when /^store/, /^load/
+ # List all macro instructions that can be lowered to a load, store or prefetch ARM64 assembly instruction
+ lastOpcodeUnsafe = true
+ when "muli", "mulp", "mulq", "smulli"
+ # List all macro instructions that can be lowered to a 64-bit multiply-accumulate ARM64 assembly instruction
+ # (defined as one of MADD, MSUB, SMADDL, SMSUBL, UMADDL or UMSUBL).
+ if lastOpcodeUnsafe
+ newList << Instruction.new(node.codeOrigin, "nopCortexA53Fix835769", [])
+ end
+ lastOpcodeUnsafe = false
+ else
+ lastOpcodeUnsafe = false
+ end
+ end
+ newList << node
+ }
+ newList
+end
+
</ins><span class="cx"> class Sequence
</span><span class="cx"> def getModifiedListARM64
</span><span class="cx"> result = @list
</span><span class="lines">@@ -284,6 +312,7 @@
</span><span class="cx"> result = riscLowerTest(result)
</span><span class="cx"> result = assignRegistersToTemporaries(result, :gpr, ARM64_EXTRA_GPRS)
</span><span class="cx"> result = assignRegistersToTemporaries(result, :fpr, ARM64_EXTRA_FPRS)
</span><ins>+ result = arm64CortexA53Fix835769(result)
</ins><span class="cx"> return result
</span><span class="cx"> end
</span><span class="cx"> end
</span><span class="lines">@@ -837,7 +866,11 @@
</span><span class="cx"> when "memfence"
</span><span class="cx"> $asm.puts "dmb sy"
</span><span class="cx"> when "pcrtoaddr"
</span><del>- $asm.puts "adr #{operands[1].arm64Operand(:ptr)}, #{operands[0].value}"
</del><ins>+ $asm.puts "adr #{operands[1].arm64Operand(:ptr)}, #{operands[0].value}"
+ when "nopCortexA53Fix835769"
+ $asm.putStr("#if CPU(ARM64_CORTEXA53)")
+ $asm.puts "nop"
+ $asm.putStr("#endif")
</ins><span class="cx"> else
</span><span class="cx"> lowerDefault
</span><span class="cx"> end
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreofflineasminstructionsrb"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/offlineasm/instructions.rb (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/offlineasm/instructions.rb 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/JavaScriptCore/offlineasm/instructions.rb 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -266,7 +266,8 @@
</span><span class="cx">
</span><span class="cx"> ARM64_INSTRUCTIONS =
</span><span class="cx"> [
</span><del>- "pcrtoaddr" # Address from PC relative offset - adr instruction
</del><ins>+ "pcrtoaddr", # Address from PC relative offset - adr instruction
+ "nopFixCortexA53Err835769" # nop on Cortex-A53 (nothing otherwise)
</ins><span class="cx"> ]
</span><span class="cx">
</span><span class="cx"> RISC_INSTRUCTIONS =
</span></span></pre></div>
<a id="trunkSourcecmakeOptionsCommoncmake"></a>
<div class="modfile"><h4>Modified: trunk/Source/cmake/OptionsCommon.cmake (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/cmake/OptionsCommon.cmake 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/cmake/OptionsCommon.cmake 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -30,6 +30,20 @@
</span><span class="cx"> set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
</span><span class="cx"> endif ()
</span><span class="cx">
</span><ins>+if (WTF_CPU_ARM64_CORTEXA53)
+ if (NOT WTF_CPU_ARM64)
+ message(FATAL_ERROR "WTF_CPU_ARM64_CORTEXA53 set without WTF_CPU_ARM64")
+ endif ()
+ message("Checking if compiler supports -mfix-cortex-a53-835769")
+ execute_process(COMMAND ${CMAKE_C_COMPILER} -mfix-cortex-a53-835769 ERROR_VARIABLE COMPILER_OUTPUT)
+ if ((NOT "${COMPILER_OUTPUT}" MATCHES "unrecognized command line option")
+ AND (NOT "${COMPILER_OUTPUT}" MATCHES "unknown argument"))
+ set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfix-cortex-a53-835769")
+ set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfix-cortex-a53-835769")
+ message("Enabling Cortex-A53 workaround for compiler")
+ endif ()
+endif ()
+
</ins><span class="cx"> option(DEBUG_FISSION "Use Debug Fission support")
</span><span class="cx"> if (DEBUG_FISSION)
</span><span class="cx"> execute_process(COMMAND ${CMAKE_C_COMPILER} -fuse-ld=gold -Wl,--version ERROR_QUIET OUTPUT_VARIABLE LD_VERSION)
</span></span></pre></div>
<a id="trunkSourcecmakeconfighcmake"></a>
<div class="modfile"><h4>Modified: trunk/Source/cmakeconfig.h.cmake (175513 => 175514)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/cmakeconfig.h.cmake 2014-11-04 07:22:18 UTC (rev 175513)
+++ trunk/Source/cmakeconfig.h.cmake 2014-11-04 07:36:15 UTC (rev 175514)
</span><span class="lines">@@ -140,6 +140,7 @@
</span><span class="cx"> #cmakedefine01 WTF_USE_TILED_BACKING_STORE
</span><span class="cx"> #cmakedefine01 HAVE_LLVM
</span><span class="cx"> #cmakedefine01 HAVE_GTK_UNIX_PRINTING
</span><ins>+#cmakedefine01 WTF_CPU_ARM64_CORTEXA53
</ins><span class="cx">
</span><span class="cx"> #if defined(BUILDING_GTK__) && !defined(GTK_API_VERSION_2)
</span><span class="cx"> #define GDK_VERSION_MIN_REQUIRED @GDK_VERSION_MIN_REQUIRED@
</span></span></pre>
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