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<title>[173312] trunk/Source/JavaScriptCore</title>
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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/173312">173312</a></dd>
<dt>Author</dt> <dd>msaboff@apple.com</dd>
<dt>Date</dt> <dd>2014-09-05 09:17:17 -0700 (Fri, 05 Sep 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>ARM: Add more coverage to ARMv7 disassembler
https://bugs.webkit.org/show_bug.cgi?id=136565
Reviewed by Mark Lam.
Added ARMV7 disassembler support for Push/Pop multiple and floating point instructions
VCMP, VCVT[R] between floating point and integer, and VLDR.
* disassembler/ARMv7/ARMv7DOpcode.cpp:
(JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::appendRegisterList):
(JSC::ARMv7Disassembler::ARMv7DOpcodeDataPopMultiple::format):
(JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushMultiple::format):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::format):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::format):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::format):
* disassembler/ARMv7/ARMv7DOpcode.h:
(JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::registerList):
(JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::condition):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::condition):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::dBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::vd):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::szBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::eBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::mBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::vm):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::condition):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::dBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::op2):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::vd):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::szBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::op):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::mBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::vm):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::condition):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::uBit):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::rn):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::vd):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::doubleReg):
(JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::immediate8):</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoredisassemblerARMv7ARMv7DOpcodecpp">trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoredisassemblerARMv7ARMv7DOpcodeh">trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.h</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (173311 => 173312)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-09-05 14:18:06 UTC (rev 173311)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-09-05 16:17:17 UTC (rev 173312)
</span><span class="lines">@@ -1,3 +1,45 @@
</span><ins>+2014-09-04 Michael Saboff <msaboff@apple.com>
+
+ ARM: Add more coverage to ARMv7 disassembler
+ https://bugs.webkit.org/show_bug.cgi?id=136565
+
+ Reviewed by Mark Lam.
+
+ Added ARMV7 disassembler support for Push/Pop multiple and floating point instructions
+ VCMP, VCVT[R] between floating point and integer, and VLDR.
+
+ * disassembler/ARMv7/ARMv7DOpcode.cpp:
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::appendRegisterList):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeDataPopMultiple::format):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushMultiple::format):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::format):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::format):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::format):
+ * disassembler/ARMv7/ARMv7DOpcode.h:
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::registerList):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeDataPushPopMultiple::condition):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::condition):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::dBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::vd):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::szBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::eBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::mBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCMP::vm):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::condition):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::dBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::op2):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::vd):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::szBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::op):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::mBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVCVTBetweenFPAndInt::vm):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::condition):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::uBit):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::rn):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::vd):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::doubleReg):
+ (JSC::ARMv7Disassembler::ARMv7DOpcodeVLDR::immediate8):
+
</ins><span class="cx"> 2014-09-04 Mark Lam <mark.lam@apple.com>
</span><span class="cx">
</span><span class="cx"> Move PropertySlot's inline functions back to PropertySlot.h.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoredisassemblerARMv7ARMv7DOpcodecpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.cpp (173311 => 173312)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.cpp 2014-09-05 14:18:06 UTC (rev 173311)
+++ trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.cpp 2014-09-05 16:17:17 UTC (rev 173312)
</span><span class="lines">@@ -113,11 +113,16 @@
</span><span class="cx"> };
</span><span class="cx">
</span><span class="cx"> static Opcode32GroupInitializer opcode32BitGroupList[] = {
</span><ins>+ OPCODE_GROUP_ENTRY(0x4, ARMv7DOpcodeDataPopMultiple),
+ OPCODE_GROUP_ENTRY(0x4, ARMv7DOpcodeDataPushMultiple),
</ins><span class="cx"> OPCODE_GROUP_ENTRY(0x5, ARMv7DOpcodeDataProcessingShiftedReg),
</span><ins>+ OPCODE_GROUP_ENTRY(0x6, ARMv7DOpcodeVLDR),
</ins><span class="cx"> OPCODE_GROUP_ENTRY(0x6, ARMv7DOpcodeVMOVSinglePrecision),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0x6, ARMv7DOpcodeVMOVDoublePrecision),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0x7, ARMv7DOpcodeFPTransfer),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0x7, ARMv7DOpcodeVMSR),
</span><ins>+ OPCODE_GROUP_ENTRY(0x7, ARMv7DOpcodeVCMP),
+ OPCODE_GROUP_ENTRY(0x7, ARMv7DOpcodeVCVTBetweenFPAndInt),
</ins><span class="cx"> OPCODE_GROUP_ENTRY(0x8, ARMv7DOpcodeDataProcessingModifiedImmediate),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0x8, ARMv7DOpcodeConditionalBranchT3),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0x8, ARMv7DOpcodeBranchOrBranchLink),
</span><span class="lines">@@ -133,6 +138,8 @@
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xb, ARMv7DOpcodeBranchOrBranchLink),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeLoadRegister),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeDataPushPopSingle), // Should be before StoreSingle*
</span><ins>+ OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeDataPopMultiple),
+ OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeDataPushMultiple),
</ins><span class="cx"> OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeStoreSingleRegister),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeStoreSingleImmediate12),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xc, ARMv7DOpcodeStoreSingleImmediate8),
</span><span class="lines">@@ -143,6 +150,9 @@
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xd, ARMv7DOpcodeDataProcessingRegExtend),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xd, ARMv7DOpcodeDataProcessingRegParallel),
</span><span class="cx"> OPCODE_GROUP_ENTRY(0xd, ARMv7DOpcodeDataProcessingRegMisc),
</span><ins>+ OPCODE_GROUP_ENTRY(0xe, ARMv7DOpcodeVLDR),
+ OPCODE_GROUP_ENTRY(0xf, ARMv7DOpcodeVCMP),
+ OPCODE_GROUP_ENTRY(0xf, ARMv7DOpcodeVCVTBetweenFPAndInt),
</ins><span class="cx"> };
</span><span class="cx">
</span><span class="cx"> bool ARMv7DOpcode::s_initialized = false;
</span><span class="lines">@@ -1425,6 +1435,46 @@
</span><span class="cx"> return m_formatBuffer;
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+void ARMv7DOpcodeDataPushPopMultiple::appendRegisterList()
+{
+ unsigned registers = registerList();
+
+ appendCharacter('{');
+ bool needSeparator = false;
+
+ for (unsigned i = 0; i < 16; i++) {
+ if (registers & (1 << i)) {
+ if (needSeparator)
+ appendSeparator();
+ appendRegisterName(i);
+ needSeparator = true;
+ }
+ }
+ appendCharacter('}');
+}
+
+const char* ARMv7DOpcodeDataPopMultiple::format()
+{
+ if (condition() != 0xe)
+ bufferPrintf(" pop%-4.4s", conditionName(condition()));
+ else
+ appendInstructionName("pop");
+ appendRegisterList();
+
+ return m_formatBuffer;
+}
+
+const char* ARMv7DOpcodeDataPushMultiple::format()
+{
+ if (condition() != 0xe)
+ bufferPrintf(" push%-3.3s", conditionName(condition()));
+ else
+ appendInstructionName("push");
+ appendRegisterList();
+
+ return m_formatBuffer;
+}
+
</ins><span class="cx"> const char* ARMv7DOpcodeStoreSingleImmediate12::format()
</span><span class="cx"> {
</span><span class="cx"> appendInstructionName(opName());
</span><span class="lines">@@ -1494,6 +1544,104 @@
</span><span class="cx"> return m_formatBuffer;
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+const char* ARMv7DOpcodeVCMP::format()
+{
+ bufferPrintf(" vcmp");
+
+ if (eBit())
+ appendCharacter('e'); // Raise exception on qNaN
+
+ if (condition() != 0xe)
+ appendString(conditionName(condition()));
+
+ appendCharacter('.');
+ appendString(szBit() ? "f64" : "f32");
+ appendCharacter(' ');
+ if (szBit()) {
+ appendFPRegisterName('d', (dBit() << 4) | vd());
+ appendSeparator();
+ appendFPRegisterName('d', (mBit() << 4) | vm());
+ } else {
+ appendFPRegisterName('s', (vd() << 1) | dBit());
+ appendSeparator();
+ appendFPRegisterName('s', (vm() << 1) | mBit());
+ }
+
+ return m_formatBuffer;
+}
+
+const char* ARMv7DOpcodeVCVTBetweenFPAndInt::format()
+{
+ bufferPrintf(" vcvt");
+ bool convertToInteger = op2() & 0x4;
+
+ if (convertToInteger) {
+ if (!op())
+ appendCharacter('r'); // Round using mode in FPSCR
+ if (condition() != 0xe)
+ appendString(conditionName(condition()));
+ appendCharacter('.');
+ appendCharacter((op2() & 1) ? 's' : 'u');
+ appendString("32.f");
+ appendString(szBit() ? "64" : "32");
+ appendCharacter(' ');
+ appendFPRegisterName('s', (vd() << 1) | dBit());
+ appendSeparator();
+ if (szBit())
+ appendFPRegisterName('d', (mBit() << 4) | vm());
+ else
+ appendFPRegisterName('s', (vm() << 1) | mBit());
+ } else {
+ if (condition() != 0xe)
+ appendString(conditionName(condition()));
+ appendCharacter('.');
+ appendString(szBit() ? "f64." : "f32.");
+ appendString(op() ? "s32" : "u32");
+ appendCharacter(' ');
+ if (szBit())
+ appendFPRegisterName('d', (dBit() << 4) | vd());
+ else
+ appendFPRegisterName('s', (vd() << 1) | dBit());
+ appendSeparator();
+ appendFPRegisterName('s', (vm() << 1) | mBit());
+ }
+
+ return m_formatBuffer;
+}
+
+const char* ARMv7DOpcodeVLDR::format()
+{
+ if (condition() != 0xe)
+ bufferPrintf(" vldr%-3.3s", conditionName(condition()));
+ else
+ appendInstructionName("vldr");
+
+ appendFPRegisterName(doubleReg() ? 'd' : 's', vd());
+ appendSeparator();
+
+ int immediate = immediate8() * 4;
+
+ if (!uBit())
+ immediate = -immediate;
+
+ appendCharacter('[');
+
+ if (rn() == RegPC)
+ appendPCRelativeOffset(immediate);
+ else {
+ appendRegisterName(rn());
+
+ if (immediate) {
+ appendSeparator();
+ appendSignedImmediate(immediate);
+ }
+ }
+
+ appendCharacter(']');
+
+ return m_formatBuffer;
+}
+
</ins><span class="cx"> const char* ARMv7DOpcodeVMOVDoublePrecision::format()
</span><span class="cx"> {
</span><span class="cx"> appendInstructionName("vmov");
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoredisassemblerARMv7ARMv7DOpcodeh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.h (173311 => 173312)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.h 2014-09-05 14:18:06 UTC (rev 173311)
+++ trunk/Source/JavaScriptCore/disassembler/ARMv7/ARMv7DOpcode.h 2014-09-05 16:17:17 UTC (rev 173312)
</span><span class="lines">@@ -1011,6 +1011,36 @@
</span><span class="cx"> unsigned op() { return (m_opcode >> 20) & 0x1; }
</span><span class="cx"> };
</span><span class="cx">
</span><ins>+class ARMv7DOpcodeDataPushPopMultiple : public ARMv7D32BitOpcode {
+protected:
+ void appendRegisterList();
+
+ unsigned registerList() { return m_opcode & 0xffff; }
+ unsigned condition() { return m_opcode >> 28; }
+};
+
+class ARMv7DOpcodeDataPopMultiple : public ARMv7DOpcodeDataPushPopMultiple {
+public:
+ static const uint32_t s_mask = 0x0fff0000;
+ static const uint32_t s_pattern = 0x08bd0000;
+
+ DEFINE_STATIC_FORMAT32(ARMv7DOpcodeDataPopMultiple, thisObj);
+
+protected:
+ const char* format();
+};
+
+class ARMv7DOpcodeDataPushMultiple : public ARMv7DOpcodeDataPushPopMultiple {
+public:
+ static const uint32_t s_mask = 0xfe7f0000;
+ static const uint32_t s_pattern = 0xe82d0000;
+
+ DEFINE_STATIC_FORMAT32(ARMv7DOpcodeDataPushMultiple, thisObj);
+
+protected:
+ const char* format();
+};
+
</ins><span class="cx"> class ARMv7DOpcodeDataStoreSingle : public ARMv7D32BitOpcode {
</span><span class="cx"> protected:
</span><span class="cx"> static const char* const s_opNames[4];
</span><span class="lines">@@ -1086,6 +1116,63 @@
</span><span class="cx"> unsigned immediate16() { return ((m_opcode >> 4) & 0xf000) | ((m_opcode >> 15) & 0x0800) | ((m_opcode >> 4) & 0x0700) | (m_opcode & 0x00ff); }
</span><span class="cx"> };
</span><span class="cx">
</span><ins>+class ARMv7DOpcodeVCMP : public ARMv7D32BitOpcode {
+public:
+ static const uint32_t s_mask = 0x0fbf0e50;
+ static const uint32_t s_pattern = 0x0eb40a40;
+
+ DEFINE_STATIC_FORMAT32(ARMv7DOpcodeVCMP, thisObj);
+
+protected:
+ const char* format();
+
+ unsigned condition() { return m_opcode >> 28; }
+ unsigned dBit() { return (m_opcode >> 22) & 0x1; }
+ unsigned vd() { return (m_opcode >> 12) & 0xf; }
+ unsigned szBit() { return (m_opcode >> 8) & 0x1; }
+ unsigned eBit() { return (m_opcode >> 7) & 0x1; }
+ unsigned mBit() { return (m_opcode >> 5) & 0x1; }
+ unsigned vm() { return m_opcode & 0xf; }
+};
+
+class ARMv7DOpcodeVCVTBetweenFPAndInt : public ARMv7D32BitOpcode {
+public:
+ static const uint32_t s_mask = 0x0fb80e50;
+ static const uint32_t s_pattern = 0x0eb80a40;
+
+ DEFINE_STATIC_FORMAT32(ARMv7DOpcodeVCVTBetweenFPAndInt, thisObj);
+
+protected:
+ const char* format();
+
+ unsigned condition() { return m_opcode >> 28; }
+ unsigned dBit() { return (m_opcode >> 22) & 0x1; }
+ unsigned op2() { return (m_opcode >> 16) & 0x7; }
+ unsigned vd() { return (m_opcode >> 12) & 0xf; }
+ unsigned szBit() { return (m_opcode >> 8) & 0x1; }
+ unsigned op() { return (m_opcode >> 7) & 0x1; }
+ unsigned mBit() { return (m_opcode >> 5) & 0x1; }
+ unsigned vm() { return m_opcode & 0xf; }
+};
+
+class ARMv7DOpcodeVLDR : public ARMv7D32BitOpcode {
+public:
+ static const uint32_t s_mask = 0x0f300e00;
+ static const uint32_t s_pattern = 0x0d100a00;
+
+ DEFINE_STATIC_FORMAT32(ARMv7DOpcodeVLDR, thisObj);
+
+protected:
+ const char* format();
+
+ unsigned condition() { return m_opcode >> 28; }
+ unsigned uBit() { return (m_opcode >> 23) & 0x1; }
+ unsigned rn() { return (m_opcode >> 16) & 0xf; }
+ unsigned vd() { return ((m_opcode >> 18) & 0x10) | ((m_opcode >> 12) & 0xf); }
+ bool doubleReg() { return !!(m_opcode & 0x100); }
+ unsigned immediate8() { return m_opcode & 0xff; }
+};
+
</ins><span class="cx"> class ARMv7DOpcodeVMOVDoublePrecision : public ARMv7D32BitOpcode {
</span><span class="cx"> public:
</span><span class="cx"> static const uint32_t s_mask = 0xffe00fd0;
</span></span></pre>
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