<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.1//EN"
"http://www.w3.org/TR/xhtml11/DTD/xhtml11.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head><meta http-equiv="content-type" content="text/html; charset=utf-8" />
<title>[173232] trunk/Source/JavaScriptCore</title>
</head>
<body>
<style type="text/css"><!--
#msg dl.meta { border: 1px #006 solid; background: #369; padding: 6px; color: #fff; }
#msg dl.meta dt { float: left; width: 6em; font-weight: bold; }
#msg dt:after { content:':';}
#msg dl, #msg dt, #msg ul, #msg li, #header, #footer, #logmsg { font-family: verdana,arial,helvetica,sans-serif; font-size: 10pt; }
#msg dl a { font-weight: bold}
#msg dl a:link { color:#fc3; }
#msg dl a:active { color:#ff0; }
#msg dl a:visited { color:#cc6; }
h3 { font-family: verdana,arial,helvetica,sans-serif; font-size: 10pt; font-weight: bold; }
#msg pre { overflow: auto; background: #ffc; border: 1px #fa0 solid; padding: 6px; }
#logmsg { background: #ffc; border: 1px #fa0 solid; padding: 1em 1em 0 1em; }
#logmsg p, #logmsg pre, #logmsg blockquote { margin: 0 0 1em 0; }
#logmsg p, #logmsg li, #logmsg dt, #logmsg dd { line-height: 14pt; }
#logmsg h1, #logmsg h2, #logmsg h3, #logmsg h4, #logmsg h5, #logmsg h6 { margin: .5em 0; }
#logmsg h1:first-child, #logmsg h2:first-child, #logmsg h3:first-child, #logmsg h4:first-child, #logmsg h5:first-child, #logmsg h6:first-child { margin-top: 0; }
#logmsg ul, #logmsg ol { padding: 0; list-style-position: inside; margin: 0 0 0 1em; }
#logmsg ul { text-indent: -1em; padding-left: 1em; }#logmsg ol { text-indent: -1.5em; padding-left: 1.5em; }
#logmsg > ul, #logmsg > ol { margin: 0 0 1em 0; }
#logmsg pre { background: #eee; padding: 1em; }
#logmsg blockquote { border: 1px solid #fa0; border-left-width: 10px; padding: 1em 1em 0 1em; background: white;}
#logmsg dl { margin: 0; }
#logmsg dt { font-weight: bold; }
#logmsg dd { margin: 0; padding: 0 0 0.5em 0; }
#logmsg dd:before { content:'\00bb';}
#logmsg table { border-spacing: 0px; border-collapse: collapse; border-top: 4px solid #fa0; border-bottom: 1px solid #fa0; background: #fff; }
#logmsg table th { text-align: left; font-weight: normal; padding: 0.2em 0.5em; border-top: 1px dotted #fa0; }
#logmsg table td { text-align: right; border-top: 1px dotted #fa0; padding: 0.2em 0.5em; }
#logmsg table thead th { text-align: center; border-bottom: 1px solid #fa0; }
#logmsg table th.Corner { text-align: left; }
#logmsg hr { border: none 0; border-top: 2px dashed #fa0; height: 1px; }
#header, #footer { color: #fff; background: #636; border: 1px #300 solid; padding: 6px; }
#patch { width: 100%; }
#patch h4 {font-family: verdana,arial,helvetica,sans-serif;font-size:10pt;padding:8px;background:#369;color:#fff;margin:0;}
#patch .propset h4, #patch .binary h4 {margin:0;}
#patch pre {padding:0;line-height:1.2em;margin:0;}
#patch .diff {width:100%;background:#eee;padding: 0 0 10px 0;overflow:auto;}
#patch .propset .diff, #patch .binary .diff {padding:10px 0;}
#patch span {display:block;padding:0 10px;}
#patch .modfile, #patch .addfile, #patch .delfile, #patch .propset, #patch .binary, #patch .copfile {border:1px solid #ccc;margin:10px 0;}
#patch ins {background:#dfd;text-decoration:none;display:block;padding:0 10px;}
#patch del {background:#fdd;text-decoration:none;display:block;padding:0 10px;}
#patch .lines, .info {color:#888;background:#fff;}
--></style>
<div id="msg">
<dl class="meta">
<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/173232">173232</a></dd>
<dt>Author</dt> <dd>commit-queue@webkit.org</dd>
<dt>Date</dt> <dd>2014-09-03 14:50:46 -0700 (Wed, 03 Sep 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>[MIPS] Wrong register usage in LLInt op_catch.
https://bugs.webkit.org/show_bug.cgi?id=125168
Patch by Balazs Kilvady <kilvadyb@homejinni.com> on 2014-09-03
Reviewed by Geoffrey Garen.
Fix register usage and add PIC header to all the ops in LLInt.
* offlineasm/instructions.rb:
* offlineasm/mips.rb:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreofflineasminstructionsrb">trunk/Source/JavaScriptCore/offlineasm/instructions.rb</a></li>
<li><a href="#trunkSourceJavaScriptCoreofflineasmmipsrb">trunk/Source/JavaScriptCore/offlineasm/mips.rb</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (173231 => 173232)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-09-03 21:42:18 UTC (rev 173231)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-09-03 21:50:46 UTC (rev 173232)
</span><span class="lines">@@ -1,3 +1,15 @@
</span><ins>+2014-09-03 Balazs Kilvady <kilvadyb@homejinni.com>
+
+ [MIPS] Wrong register usage in LLInt op_catch.
+ https://bugs.webkit.org/show_bug.cgi?id=125168
+
+ Reviewed by Geoffrey Garen.
+
+ Fix register usage and add PIC header to all the ops in LLInt.
+
+ * offlineasm/instructions.rb:
+ * offlineasm/mips.rb:
+
</ins><span class="cx"> 2014-09-03 Saam Barati <saambarati1@gmail.com>
</span><span class="cx">
</span><span class="cx"> Create tests for type profiling
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreofflineasminstructionsrb"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/offlineasm/instructions.rb (173231 => 173232)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/offlineasm/instructions.rb 2014-09-03 21:42:18 UTC (rev 173231)
+++ trunk/Source/JavaScriptCore/offlineasm/instructions.rb 2014-09-03 21:50:46 UTC (rev 173232)
</span><span class="lines">@@ -280,12 +280,12 @@
</span><span class="cx">
</span><span class="cx"> MIPS_INSTRUCTIONS =
</span><span class="cx"> [
</span><ins>+ "la",
</ins><span class="cx"> "movz",
</span><span class="cx"> "movn",
</span><span class="cx"> "slt",
</span><span class="cx"> "sltu",
</span><del>- "pichdr",
- "pichdrra"
</del><ins>+ "pichdr"
</ins><span class="cx"> ]
</span><span class="cx">
</span><span class="cx"> SH4_INSTRUCTIONS =
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreofflineasmmipsrb"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/offlineasm/mips.rb (173231 => 173232)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/offlineasm/mips.rb 2014-09-03 21:42:18 UTC (rev 173231)
+++ trunk/Source/JavaScriptCore/offlineasm/mips.rb 2014-09-03 21:50:46 UTC (rev 173232)
</span><span class="lines">@@ -62,7 +62,6 @@
</span><span class="cx"> MIPS_ZERO_REG = SpecialRegister.new("$zero")
</span><span class="cx"> MIPS_GP_REG = SpecialRegister.new("$gp")
</span><span class="cx"> MIPS_GPSAVE_REG = SpecialRegister.new("$s4")
</span><del>-MIPS_JUMP_REG = SpecialRegister.new("$ra")
</del><span class="cx"> MIPS_CALL_REG = SpecialRegister.new("$t9")
</span><span class="cx"> MIPS_TEMP_FPRS = [SpecialRegister.new("$f16")]
</span><span class="cx"> MIPS_SCRATCH_FPR = SpecialRegister.new("$f18")
</span><span class="lines">@@ -162,6 +161,70 @@
</span><span class="cx"> end
</span><span class="cx">
</span><span class="cx"> #
</span><ins>+# Negate condition of branches to labels.
+#
+
+class Instruction
+ def mipsNegateCondition(list)
+ /^(b(add|sub|or|mul|t)?)([ipb])/.match(opcode)
+ case $~.post_match
+ when "eq"
+ op = "neq"
+ when "neq"
+ op = "eq"
+ when "z"
+ op = "nz"
+ when "nz"
+ op = "z"
+ when "gt"
+ op = "lteq"
+ when "gteq"
+ op = "lt"
+ when "lt"
+ op = "gteq"
+ when "lteq"
+ op = "gt"
+ when "a"
+ op = "beq"
+ when "b"
+ op = "aeq"
+ when "aeq"
+ op = "b"
+ when "beq"
+ op = "a"
+ else
+ raise "Can't negate #{opcode} branch."
+ end
+ noBranch = LocalLabel.unique("nobranch")
+ noBranchRef = LocalLabelReference.new(codeOrigin, noBranch)
+ toRef = operands[-1]
+ list << Instruction.new(codeOrigin, "#{$1}#{$3}#{op}", operands[0..-2].push(noBranchRef), annotation)
+ list << Instruction.new(codeOrigin, "la", [toRef, MIPS_CALL_REG])
+ list << Instruction.new(codeOrigin, "jmp", [MIPS_CALL_REG])
+ list << noBranch
+ end
+end
+
+def mipsLowerFarBranchOps(list)
+ newList = []
+ list.each {
+ | node |
+ if node.is_a? Instruction
+ annotation = node.annotation
+ case node.opcode
+ when /^b(add|sub|or|mul|t)?([ipb])/
+ if node.operands[-1].is_a? LabelReference
+ node.mipsNegateCondition(newList)
+ next
+ end
+ end
+ end
+ newList << node
+ }
+ newList
+end
+
+#
</ins><span class="cx"> # Lower 'and' masked branches
</span><span class="cx"> #
</span><span class="cx">
</span><span class="lines">@@ -445,6 +508,30 @@
</span><span class="cx"> # Specialization of lowering of misplaced addresses.
</span><span class="cx"> #
</span><span class="cx">
</span><ins>+class LocalLabelReference
+ def register?
+ false
+ end
+end
+
+def mipsAsRegister(preList, postList, operand, needRestore)
+ tmp = MIPS_CALL_REG
+ if operand.address?
+ preList << Instruction.new(operand.codeOrigin, "loadp", [operand, MIPS_CALL_REG])
+ elsif operand.is_a? LabelReference
+ preList << Instruction.new(operand.codeOrigin, "la", [operand, MIPS_CALL_REG])
+ elsif operand.register? and operand != MIPS_CALL_REG
+ preList << Instruction.new(operand.codeOrigin, "move", [operand, MIPS_CALL_REG])
+ else
+ needRestore = false
+ tmp = operand
+ end
+ if needRestore
+ postList << Instruction.new(operand.codeOrigin, "move", [MIPS_GPSAVE_REG, MIPS_GP_REG])
+ end
+ tmp
+end
+
</ins><span class="cx"> def mipsLowerMisplacedAddresses(list)
</span><span class="cx"> newList = []
</span><span class="cx"> list.each {
</span><span class="lines">@@ -454,33 +541,13 @@
</span><span class="cx"> annotation = node.annotation
</span><span class="cx"> case node.opcode
</span><span class="cx"> when "jmp"
</span><del>- if node.operands[0].address?
- newList << Instruction.new(node.operands[0].codeOrigin, "loadi", [node.operands[0], MIPS_JUMP_REG])
- newList << Instruction.new(node.codeOrigin, node.opcode, [MIPS_JUMP_REG])
- else
- newList << Instruction.new(node.codeOrigin,
- node.opcode,
- [riscAsRegister(newList, postInstructions, node.operands[0], "p", false)])
- end
</del><ins>+ newList << Instruction.new(node.codeOrigin,
+ node.opcode,
+ [mipsAsRegister(newList, [], node.operands[0], false)])
</ins><span class="cx"> when "call"
</span><del>- restoreGP = false;
- tmp = MIPS_CALL_REG
- if node.operands[0].address?
- newList << Instruction.new(node.operands[0].codeOrigin, "loadp", [node.operands[0], MIPS_CALL_REG])
- restoreGP = true;
- elsif node.operands[0].is_a? LabelReference
- tmp = node.operands[0]
- restoreGP = true;
- elsif node.operands[0].register?
- newList << Instruction.new(node.operands[0].codeOrigin, "move", [node.operands[0], MIPS_CALL_REG])
- restoreGP = true;
- else
- tmp = node.operands[0]
- end
- newList << Instruction.new(node.codeOrigin, node.opcode, [tmp])
- if restoreGP
- newList << Instruction.new(node.codeOrigin, "move", [MIPS_GPSAVE_REG, MIPS_GP_REG])
- end
</del><ins>+ newList << Instruction.new(node.codeOrigin,
+ node.opcode,
+ [mipsAsRegister(newList, postInstructions, node.operands[0], true)])
</ins><span class="cx"> when "slt", "sltu"
</span><span class="cx"> newList << Instruction.new(node.codeOrigin,
</span><span class="cx"> node.opcode,
</span><span class="lines">@@ -565,7 +632,7 @@
</span><span class="cx"> end
</span><span class="cx">
</span><span class="cx"> #
</span><del>-# Add PIC compatible header code to prologue/entry rutins.
</del><ins>+# Add PIC compatible header code to all the LLInt rutins.
</ins><span class="cx"> #
</span><span class="cx">
</span><span class="cx"> def mipsAddPICCode(list)
</span><span class="lines">@@ -574,13 +641,7 @@
</span><span class="cx"> | node |
</span><span class="cx"> myList << node
</span><span class="cx"> if node.is_a? Label
</span><del>- if /_prologue$/.match(node.name) || /^_llint_function_/.match(node.name)
- # Functions called from trampoline/JIT codes.
- myList << Instruction.new(node.codeOrigin, "pichdr", [])
- elsif /_llint_op_catch/.match(node.name)
- # Exception cactcher entry point function.
- myList << Instruction.new(node.codeOrigin, "pichdrra", [])
- end
</del><ins>+ myList << Instruction.new(node.codeOrigin, "pichdr", [])
</ins><span class="cx"> end
</span><span class="cx"> }
</span><span class="cx"> myList
</span><span class="lines">@@ -606,6 +667,7 @@
</span><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> result = mipsAddPICCode(result)
</span><ins>+ result = mipsLowerFarBranchOps(result)
</ins><span class="cx"> result = mipsLowerSimpleBranchOps(result)
</span><span class="cx"> result = riscLowerSimpleBranchOps(result)
</span><span class="cx"> result = riscLowerHardBranchOps(result)
</span><span class="lines">@@ -714,6 +776,16 @@
</span><span class="cx"> end
</span><span class="cx"> end
</span><span class="cx">
</span><ins>+def emitMIPSJumpOrCall(opcode, operand)
+ if operand.label?
+ raise "Direct call/jump to a not local label." unless operand.is_a? LocalLabelReference
+ $asm.puts "#{opcode} #{operand.asmLabel}"
+ else
+ raise "Invalid call/jump register." unless operand == MIPS_CALL_REG
+ $asm.puts "#{opcode}r #{MIPS_CALL_REG.mipsOperand}"
+ end
+end
+
</ins><span class="cx"> class Instruction
</span><span class="cx"> def lowerMIPS
</span><span class="cx"> $asm.comment codeOriginString
</span><span class="lines">@@ -784,6 +856,8 @@
</span><span class="cx"> $asm.puts "ldc1 #{mipsFlippedOperands(operands)}"
</span><span class="cx"> when "stored"
</span><span class="cx"> $asm.puts "sdc1 #{mipsOperands(operands)}"
</span><ins>+ when "la"
+ $asm.puts "la #{operands[1].mipsOperand}, #{operands[0].asmLabel}"
</ins><span class="cx"> when "addd"
</span><span class="cx"> emitMIPS("add.d", operands)
</span><span class="cx"> when "divd"
</span><span class="lines">@@ -871,17 +945,9 @@
</span><span class="cx"> when "bilteq", "bplteq", "bblteq"
</span><span class="cx"> $asm.puts "ble #{mipsOperands(operands[0..1])}, #{operands[2].asmLabel}"
</span><span class="cx"> when "jmp"
</span><del>- if operands[0].label?
- $asm.puts "j #{operands[0].asmLabel}"
- else
- $asm.puts "jr #{operands[0].mipsOperand}"
- end
</del><ins>+ emitMIPSJumpOrCall("j", operands[0])
</ins><span class="cx"> when "call"
</span><del>- if operands[0].label?
- $asm.puts "jal #{operands[0].asmLabel}"
- else
- $asm.puts "jalr #{operands[0].mipsOperand}"
- end
</del><ins>+ emitMIPSJumpOrCall("jal", operands[0])
</ins><span class="cx"> when "break"
</span><span class="cx"> $asm.puts "break"
</span><span class="cx"> when "ret"
</span><span class="lines">@@ -940,11 +1006,8 @@
</span><span class="cx"> when "sltu", "sltub"
</span><span class="cx"> $asm.puts "sltu #{operands[0].mipsOperand}, #{operands[1].mipsOperand}, #{operands[2].mipsOperand}"
</span><span class="cx"> when "pichdr"
</span><del>- $asm.putStr("OFFLINE_ASM_CPLOAD($25)")
- $asm.puts "move $s4, $gp"
- when "pichdrra"
- $asm.putStr("OFFLINE_ASM_CPLOAD($31)")
- $asm.puts "move $s4, $gp"
</del><ins>+ $asm.putStr("OFFLINE_ASM_CPLOAD(#{MIPS_CALL_REG.mipsOperand})")
+ $asm.puts "move #{MIPS_GPSAVE_REG.mipsOperand}, #{MIPS_GP_REG.mipsOperand}"
</ins><span class="cx"> when "memfence"
</span><span class="cx"> $asm.puts "sync"
</span><span class="cx"> else
</span></span></pre>
</div>
</div>
</body>
</html>