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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/172746">172746</a></dd>
<dt>Author</dt> <dd>ossy@webkit.org</dd>
<dt>Date</dt> <dd>2014-08-19 00:14:30 -0700 (Tue, 19 Aug 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>REGRESSION(<a href="http://trac.webkit.org/projects/webkit/changeset/163179">r163179</a>): It broke the build on ARM Thumb2 with GCC
https://bugs.webkit.org/show_bug.cgi?id=136028
Patch by Michael Saboff <msaboff@apple.com> on 2014-08-19
Reviewed by Oliver Hunt.
Added back ARMv7 conditionals around three op addp and subp since ARM Thumb2 spec says that
the behavior for those ops are undefined. This was originally done in changeset 163179.
* llint/LowLevelInterpreter32_64.asm:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCorellintLowLevelInterpreter32_64asm">trunk/Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (172745 => 172746)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-08-19 06:12:49 UTC (rev 172745)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-08-19 07:14:30 UTC (rev 172746)
</span><span class="lines">@@ -1,3 +1,15 @@
</span><ins>+2014-08-19 Michael Saboff <msaboff@apple.com>
+
+ REGRESSION(r163179): It broke the build on ARM Thumb2 with GCC
+ https://bugs.webkit.org/show_bug.cgi?id=136028
+
+ Reviewed by Oliver Hunt.
+
+ Added back ARMv7 conditionals around three op addp and subp since ARM Thumb2 spec says that
+ the behavior for those ops are undefined. This was originally done in changeset 163179.
+
+ * llint/LowLevelInterpreter32_64.asm:
+
</ins><span class="cx"> 2014-08-18 Commit Queue <commit-queue@webkit.org>
</span><span class="cx">
</span><span class="cx"> Unreviewed, rolling out r172741.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCorellintLowLevelInterpreter32_64asm"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm (172745 => 172746)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm 2014-08-19 06:12:49 UTC (rev 172745)
+++ trunk/Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm 2014-08-19 07:14:30 UTC (rev 172746)
</span><span class="lines">@@ -203,7 +203,12 @@
</span><span class="cx"> loadp 8[cfr], entry
</span><span class="cx"> end
</span><span class="cx">
</span><del>- vmEntryRecord(cfr, sp)
</del><ins>+ if ARMv7
+ vmEntryRecord(cfr, temp1)
+ move temp1, sp
+ else
+ vmEntryRecord(cfr, sp)
+ end
</ins><span class="cx">
</span><span class="cx"> storep vm, VMEntryRecord::m_vm[sp]
</span><span class="cx"> loadp VM::topCallFrame[vm], temp2
</span><span class="lines">@@ -219,7 +224,12 @@
</span><span class="cx"> elsif ARM or ARMv7 or ARMv7_TRADITIONAL
</span><span class="cx"> addp CallFrameAlignSlots * SlotSize, sp, temp1
</span><span class="cx"> clrbp temp1, StackAlignmentMask, temp1
</span><del>- subp temp1, CallFrameAlignSlots * SlotSize, sp
</del><ins>+ if ARMv7
+ subp temp1, CallFrameAlignSlots * SlotSize, temp1
+ move temp1, sp
+ else
+ subp temp1, CallFrameAlignSlots * SlotSize, sp
+ end
</ins><span class="cx"> end
</span><span class="cx">
</span><span class="cx"> if X86 or X86_WIN
</span><span class="lines">@@ -252,7 +262,12 @@
</span><span class="cx">
</span><span class="cx"> cCall2(_llint_throw_stack_overflow_error, vm, protoCallFrame)
</span><span class="cx">
</span><del>- vmEntryRecord(cfr, sp)
</del><ins>+ if ARMv7
+ vmEntryRecord(cfr, temp1)
+ move temp1, sp
+ else
+ vmEntryRecord(cfr, sp)
+ end
</ins><span class="cx">
</span><span class="cx"> loadp VMEntryRecord::m_vm[sp], temp3
</span><span class="cx"> loadp VMEntryRecord::m_prevTopCallFrame[sp], temp4
</span><span class="lines">@@ -260,7 +275,12 @@
</span><span class="cx"> loadp VMEntryRecord::m_prevTopVMEntryFrame[sp], temp4
</span><span class="cx"> storep temp4, VM::topVMEntryFrame[temp3]
</span><span class="cx">
</span><del>- subp cfr, CalleeRegisterSaveSize, sp
</del><ins>+ if ARMv7
+ subp cfr, CalleeRegisterSaveSize, temp3
+ move temp3, sp
+ else
+ subp cfr, CalleeRegisterSaveSize, sp
+ end
</ins><span class="cx">
</span><span class="cx"> popCalleeSaves()
</span><span class="cx"> functionEpilogue()
</span><span class="lines">@@ -308,7 +328,12 @@
</span><span class="cx">
</span><span class="cx"> makeCall(entry, temp1, temp2)
</span><span class="cx">
</span><del>- vmEntryRecord(cfr, sp)
</del><ins>+ if ARMv7
+ vmEntryRecord(cfr, temp1)
+ move temp1, sp
+ else
+ vmEntryRecord(cfr, sp)
+ end
</ins><span class="cx">
</span><span class="cx"> loadp VMEntryRecord::m_vm[sp], temp3
</span><span class="cx"> loadp VMEntryRecord::m_prevTopCallFrame[sp], temp4
</span><span class="lines">@@ -316,7 +341,12 @@
</span><span class="cx"> loadp VMEntryRecord::m_prevTopVMEntryFrame[sp], temp4
</span><span class="cx"> storep temp4, VM::topVMEntryFrame[temp3]
</span><span class="cx">
</span><del>- subp cfr, CalleeRegisterSaveSize, sp
</del><ins>+ if ARMv7
+ subp cfr, CalleeRegisterSaveSize, temp3
+ move temp3, sp
+ else
+ subp cfr, CalleeRegisterSaveSize, sp
+ end
</ins><span class="cx">
</span><span class="cx"> popCalleeSaves()
</span><span class="cx"> functionEpilogue()
</span><span class="lines">@@ -372,7 +402,12 @@
</span><span class="cx">
</span><span class="cx"> loadp CallerFrame + PayloadOffset[cfr], cfr
</span><span class="cx">
</span><del>- vmEntryRecord(cfr, sp)
</del><ins>+ if ARMv7
+ vmEntryRecord(cfr, t3)
+ move t3, sp
+ else
+ vmEntryRecord(cfr, sp)
+ end
</ins><span class="cx">
</span><span class="cx"> loadp VMEntryRecord::m_vm[sp], t3
</span><span class="cx"> loadp VMEntryRecord::m_prevTopCallFrame[sp], t5
</span><span class="lines">@@ -380,7 +415,12 @@
</span><span class="cx"> loadp VMEntryRecord::m_prevTopVMEntryFrame[sp], t5
</span><span class="cx"> storep t5, VM::topVMEntryFrame[t3]
</span><span class="cx">
</span><del>- subp cfr, CalleeRegisterSaveSize, sp
</del><ins>+ if ARMv7
+ subp cfr, CalleeRegisterSaveSize, t3
+ move t3, sp
+ else
+ subp cfr, CalleeRegisterSaveSize, sp
+ end
</ins><span class="cx">
</span><span class="cx"> popCalleeSaves()
</span><span class="cx"> functionEpilogue()
</span></span></pre>
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