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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/169947">169947</a></dd>
<dt>Author</dt> <dd>commit-queue@webkit.org</dd>
<dt>Date</dt> <dd>2014-06-13 13:43:32 -0700 (Fri, 13 Jun 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>Make css jit compile for armv7.
https://bugs.webkit.org/show_bug.cgi?id=133596
Patch by Alex Christensen <achristensen@webkit.org> on 2014-06-13
Reviewed by Benjamin Poulain.
Source/JavaScriptCore:
* assembler/MacroAssembler.h:
Use branchPtr on ARM_THUMB2.
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::addPtrNoFlags):
(JSC::MacroAssemblerARMv7::or32):
(JSC::MacroAssemblerARMv7::test32):
(JSC::MacroAssemblerARMv7::branch):
(JSC::MacroAssemblerARMv7::branchPtr):
Added macros necessary for css jit.
Source/WebCore:
* cssjit/FunctionCall.h:
(WebCore::FunctionCall::swapArguments):
Implemented for ARM_THUMB2 and removed allocator hack.
* cssjit/RegisterAllocator.h:
Added list of ARM_THUMB2 general purpose registers.
(WebCore::RegisterAllocator::isValidRegister):
Added ARM register range and corrected ARM64 register range now that <a href="http://trac.webkit.org/projects/webkit/changeset/15">r15</a> is tempRegister.
* cssjit/SelectorCompiler.cpp:
(WebCore::SelectorCompiler::SelectorCodeGenerator::compile):
Return CannotCompile if compiling fails because of lack of registers.
(WebCore::SelectorCompiler::SelectorCodeGenerator::generatePrologue):
(WebCore::SelectorCompiler::SelectorCodeGenerator::generateEpilogue):
Implemented for ARM_THUMB2.
(WebCore::SelectorCompiler::SelectorCodeGenerator::generateSelectorChecker):
Return false if the selector cannot be compiled because of lack of registers.
(WebCore::SelectorCompiler::SelectorCodeGenerator::addFlagsToElementStyleFromContext):
Added code using 32-bit operations and used macro assembler for 64-bit operations.
(WebCore::SelectorCompiler::SelectorCodeGenerator::modulo):
Implemented for APPLE_ARMV7S, where sdiv is not a template in the assembler.
(WebCore::SelectorCompiler::SelectorCodeGenerator::generateElementAttributesMatching):
Use addPtr instead of add64.</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerMacroAssemblerh">trunk/Source/JavaScriptCore/assembler/MacroAssembler.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerMacroAssemblerARMv7h">trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h</a></li>
<li><a href="#trunkSourceWebCoreChangeLog">trunk/Source/WebCore/ChangeLog</a></li>
<li><a href="#trunkSourceWebCorecssjitFunctionCallh">trunk/Source/WebCore/cssjit/FunctionCall.h</a></li>
<li><a href="#trunkSourceWebCorecssjitRegisterAllocatorh">trunk/Source/WebCore/cssjit/RegisterAllocator.h</a></li>
<li><a href="#trunkSourceWebCorecssjitSelectorCompilercpp">trunk/Source/WebCore/cssjit/SelectorCompiler.cpp</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -1,3 +1,20 @@
</span><ins>+2014-06-13 Alex Christensen <achristensen@webkit.org>
+
+ Make css jit compile for armv7.
+ https://bugs.webkit.org/show_bug.cgi?id=133596
+
+ Reviewed by Benjamin Poulain.
+
+ * assembler/MacroAssembler.h:
+ Use branchPtr on ARM_THUMB2.
+ * assembler/MacroAssemblerARMv7.h:
+ (JSC::MacroAssemblerARMv7::addPtrNoFlags):
+ (JSC::MacroAssemblerARMv7::or32):
+ (JSC::MacroAssemblerARMv7::test32):
+ (JSC::MacroAssemblerARMv7::branch):
+ (JSC::MacroAssemblerARMv7::branchPtr):
+ Added macros necessary for css jit.
+
</ins><span class="cx"> 2014-06-13 Filip Pizlo <fpizlo@apple.com>
</span><span class="cx">
</span><span class="cx"> Unreviewed, fix ARMv7.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerMacroAssemblerh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/MacroAssembler.h (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/MacroAssembler.h 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/JavaScriptCore/assembler/MacroAssembler.h 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -117,9 +117,9 @@
</span><span class="cx"> using MacroAssemblerBase::and32;
</span><span class="cx"> using MacroAssemblerBase::branchAdd32;
</span><span class="cx"> using MacroAssemblerBase::branchMul32;
</span><del>-#if CPU(ARM64) || CPU(X86_64)
</del><ins>+#if CPU(ARM64) || CPU(ARM_THUMB2) || CPU(X86_64)
</ins><span class="cx"> using MacroAssemblerBase::branchPtr;
</span><del>-#endif // CPU(X86_64)
</del><ins>+#endif
</ins><span class="cx"> using MacroAssemblerBase::branchSub32;
</span><span class="cx"> using MacroAssemblerBase::lshift32;
</span><span class="cx"> using MacroAssemblerBase::or32;
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerMacroAssemblerARMv7h"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -226,6 +226,11 @@
</span><span class="cx"> store32(dataTempRegister, address.m_ptr);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest)
+ {
+ add32(imm, srcDest);
+ }
+
</ins><span class="cx"> void add64(TrustedImm32 imm, AbsoluteAddress address)
</span><span class="cx"> {
</span><span class="cx"> move(TrustedImmPtr(address.m_ptr), addressTempRegister);
</span><span class="lines">@@ -337,6 +342,13 @@
</span><span class="cx"> store32(dataTempRegister, addressTempRegister);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ void or32(TrustedImm32 imm, Address address)
+ {
+ load32(address, dataTempRegister);
+ or32(imm, dataTempRegister, dataTempRegister);
+ store32(dataTempRegister, address);
+ }
+
</ins><span class="cx"> void or32(TrustedImm32 imm, RegisterID dest)
</span><span class="cx"> {
</span><span class="cx"> or32(imm, dest, dest);
</span><span class="lines">@@ -1336,6 +1348,16 @@
</span><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> public:
</span><ins>+ void test32(ResultCondition, RegisterID reg, TrustedImm32 mask)
+ {
+ test32(reg, mask);
+ }
+
+ Jump branch(ResultCondition cond)
+ {
+ return Jump(makeBranch(cond));
+ }
+
</ins><span class="cx"> Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
</span><span class="cx"> {
</span><span class="cx"> m_assembler.cmp(left, right);
</span><span class="lines">@@ -1394,6 +1416,12 @@
</span><span class="cx"> return branch32(cond, addressTempRegister, right);
</span><span class="cx"> }
</span><span class="cx">
</span><ins>+ Jump branchPtr(RelationalCondition cond, BaseIndex left, RegisterID right)
+ {
+ load32(left, dataTempRegister);
+ return branch32(cond, dataTempRegister, right);
+ }
+
</ins><span class="cx"> Jump branch8(RelationalCondition cond, RegisterID left, TrustedImm32 right)
</span><span class="cx"> {
</span><span class="cx"> compare32(left, right);
</span></span></pre></div>
<a id="trunkSourceWebCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/WebCore/ChangeLog (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WebCore/ChangeLog 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/WebCore/ChangeLog 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -1,3 +1,32 @@
</span><ins>+2014-06-13 Alex Christensen <achristensen@webkit.org>
+
+ Make css jit compile for armv7.
+ https://bugs.webkit.org/show_bug.cgi?id=133596
+
+ Reviewed by Benjamin Poulain.
+
+ * cssjit/FunctionCall.h:
+ (WebCore::FunctionCall::swapArguments):
+ Implemented for ARM_THUMB2 and removed allocator hack.
+ * cssjit/RegisterAllocator.h:
+ Added list of ARM_THUMB2 general purpose registers.
+ (WebCore::RegisterAllocator::isValidRegister):
+ Added ARM register range and corrected ARM64 register range now that r15 is tempRegister.
+ * cssjit/SelectorCompiler.cpp:
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::compile):
+ Return CannotCompile if compiling fails because of lack of registers.
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::generatePrologue):
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::generateEpilogue):
+ Implemented for ARM_THUMB2.
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::generateSelectorChecker):
+ Return false if the selector cannot be compiled because of lack of registers.
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::addFlagsToElementStyleFromContext):
+ Added code using 32-bit operations and used macro assembler for 64-bit operations.
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::modulo):
+ Implemented for APPLE_ARMV7S, where sdiv is not a template in the assembler.
+ (WebCore::SelectorCompiler::SelectorCodeGenerator::generateElementAttributesMatching):
+ Use addPtr instead of add64.
+
</ins><span class="cx"> 2014-06-13 Anders Carlsson <andersca@apple.com>
</span><span class="cx">
</span><span class="cx"> Add a HTTPHeaderMap::get overload that takes an HTTPHeaderName
</span></span></pre></div>
<a id="trunkSourceWebCorecssjitFunctionCallh"></a>
<div class="modfile"><h4>Modified: trunk/Source/WebCore/cssjit/FunctionCall.h (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WebCore/cssjit/FunctionCall.h 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/WebCore/cssjit/FunctionCall.h 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -99,32 +99,12 @@
</span><span class="cx"> // x86 can swap without a temporary register. On other architectures, we need allocate a temporary register to switch the values.
</span><span class="cx"> #if CPU(X86) || CPU(X86_64)
</span><span class="cx"> m_assembler.swap(a, b);
</span><del>-#elif CPU(ARM64)
</del><ins>+#elif CPU(ARM64) || CPU(ARM_THUMB2)
</ins><span class="cx"> m_assembler.move(a, tempRegister);
</span><span class="cx"> m_assembler.move(b, a);
</span><span class="cx"> m_assembler.move(tempRegister, b);
</span><span class="cx"> #else
</span><del>- if (m_registerAllocator.availableRegisterCount()) {
- // Usually we can just use a free register.
- // FIXME: We need to make sure that tempValue is not a or b.
- LocalRegister tempValue(m_registerAllocator);
- m_assembler.move(a, tempValue);
- m_assembler.move(b, a);
- m_assembler.move(tempValue, b);
- } else {
- // If there is no free register, everything should be on the stack at this point. We can take
- // the first of those saved registers and use it as a temporary.
- JSC::MacroAssembler::RegisterID pushedRegister;
- for (unsigned i = 0; i < m_registerAllocator.allocatedRegisters().size(); ++i) {
- pushedRegister = m_registerAllocator.allocatedRegisters()[i];
- if (pushedRegister != a && pushedRegister != b)
- break;
- }
- ASSERT(pushedRegister != a && pushedRegister != b);
- m_assembler.move(a, pushedRegister);
- m_assembler.move(b, a);
- m_assembler.move(pushedRegister, b);
- }
</del><ins>+#error Missing implementationg for matching swapping argument registers.
</ins><span class="cx"> #endif
</span><span class="cx"> }
</span><span class="cx">
</span></span></pre></div>
<a id="trunkSourceWebCorecssjitRegisterAllocatorh"></a>
<div class="modfile"><h4>Modified: trunk/Source/WebCore/cssjit/RegisterAllocator.h (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WebCore/cssjit/RegisterAllocator.h 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/WebCore/cssjit/RegisterAllocator.h 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -56,6 +56,19 @@
</span><span class="cx"> JSC::ARM64Registers::x19
</span><span class="cx"> };
</span><span class="cx"> static const JSC::MacroAssembler::RegisterID tempRegister = JSC::ARM64Registers::x15;
</span><ins>+#elif CPU(ARM_THUMB2)
+static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] {
+ JSC::ARMRegisters::r0,
+ JSC::ARMRegisters::r1,
+ JSC::ARMRegisters::r2,
+ JSC::ARMRegisters::r3,
+ JSC::ARMRegisters::r7, // r7 is fp, and it's pushed in the prologue and popped in the epilogue so we can use it without saving it as long as we have a prologue.
+};
+static const JSC::MacroAssembler::RegisterID calleeSavedRegisters[] = {
+ JSC::ARMRegisters::r4,
+ JSC::ARMRegisters::r5,
+};
+static const JSC::MacroAssembler::RegisterID tempRegister = JSC::ARMRegisters::r12; // ip
</ins><span class="cx"> #elif CPU(X86_64)
</span><span class="cx"> static const JSC::MacroAssembler::RegisterID callerSavedRegisters[] = {
</span><span class="cx"> JSC::X86Registers::eax,
</span><span class="lines">@@ -138,8 +151,10 @@
</span><span class="cx"> {
</span><span class="cx"> #if CPU(ARM64)
</span><span class="cx"> return registerID >= JSC::ARM64Registers::x0 && registerID <= JSC::ARM64Registers::x15;
</span><ins>+#elif CPU(ARM_THUMB2)
+ return registerID >= JSC::ARMRegisters::r0 && registerID <= JSC::ARMRegisters::r7 && registerID != JSC::ARMRegisters::r6;
</ins><span class="cx"> #elif CPU(X86_64)
</span><del>- return registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::r15;
</del><ins>+ return registerID >= JSC::X86Registers::eax && registerID <= JSC::X86Registers::r14;
</ins><span class="cx"> #else
</span><span class="cx"> #error RegisterAllocator does not define the valid register range for the current architecture.
</span><span class="cx"> #endif
</span></span></pre></div>
<a id="trunkSourceWebCorecssjitSelectorCompilercpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/WebCore/cssjit/SelectorCompiler.cpp (169946 => 169947)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/WebCore/cssjit/SelectorCompiler.cpp 2014-06-13 20:37:08 UTC (rev 169946)
+++ trunk/Source/WebCore/cssjit/SelectorCompiler.cpp 2014-06-13 20:43:32 UTC (rev 169947)
</span><span class="lines">@@ -198,7 +198,7 @@
</span><span class="cx"> static const Assembler::RegisterID checkingContextRegister;
</span><span class="cx"> static const Assembler::RegisterID callFrameRegister;
</span><span class="cx">
</span><del>- void generateSelectorChecker();
</del><ins>+ bool generateSelectorChecker();
</ins><span class="cx">
</span><span class="cx"> // Element relations tree walker.
</span><span class="cx"> void generateWalkToParentNode(Assembler::RegisterID targetRegister);
</span><span class="lines">@@ -692,7 +692,8 @@
</span><span class="cx"> switch (m_functionType) {
</span><span class="cx"> case FunctionType::SimpleSelectorChecker:
</span><span class="cx"> case FunctionType::SelectorCheckerWithCheckingContext:
</span><del>- generateSelectorChecker();
</del><ins>+ if (!generateSelectorChecker())
+ return SelectorCompilationStatus::CannotCompile;
</ins><span class="cx"> break;
</span><span class="cx"> case FunctionType::CannotMatchAnything:
</span><span class="cx"> m_assembler.move(Assembler::TrustedImm32(0), returnRegister);
</span><span class="lines">@@ -1088,6 +1089,12 @@
</span><span class="cx"> prologueRegisters.append(JSC::ARM64Registers::fp);
</span><span class="cx"> m_prologueStackReferences = m_stackAllocator.push(prologueRegisters);
</span><span class="cx"> return true;
</span><ins>+#elif CPU(ARM_THUMB2)
+ Vector<JSC::MacroAssembler::RegisterID, 2> prologueRegisters;
+ prologueRegisters.append(JSC::ARMRegisters::lr);
+ prologueRegisters.append(JSC::ARMRegisters::fp); // fp is used as a caller saved register because we always have a prologue for now.
+ m_prologueStackReferences = m_stackAllocator.push(prologueRegisters);
+ return true;
</ins><span class="cx"> #elif CPU(X86_64) && CSS_SELECTOR_JIT_DEBUGGING
</span><span class="cx"> Vector<JSC::MacroAssembler::RegisterID, 1> prologueRegister;
</span><span class="cx"> prologueRegister.append(callFrameRegister);
</span><span class="lines">@@ -1104,6 +1111,11 @@
</span><span class="cx"> prologueRegisters.append(JSC::ARM64Registers::lr);
</span><span class="cx"> prologueRegisters.append(JSC::ARM64Registers::fp);
</span><span class="cx"> m_stackAllocator.pop(m_prologueStackReferences, prologueRegisters);
</span><ins>+#elif CPU(ARM_THUMB2)
+ Vector<JSC::MacroAssembler::RegisterID, 2> prologueRegisters;
+ prologueRegisters.append(JSC::ARMRegisters::lr);
+ prologueRegisters.append(JSC::ARMRegisters::fp);
+ m_stackAllocator.pop(m_prologueStackReferences, prologueRegisters);
</ins><span class="cx"> #elif CPU(X86_64) && CSS_SELECTOR_JIT_DEBUGGING
</span><span class="cx"> Vector<JSC::MacroAssembler::RegisterID, 1> prologueRegister;
</span><span class="cx"> prologueRegister.append(callFrameRegister);
</span><span class="lines">@@ -1111,17 +1123,29 @@
</span><span class="cx"> #endif
</span><span class="cx"> }
</span><span class="cx">
</span><del>-void SelectorCodeGenerator::generateSelectorChecker()
</del><ins>+bool SelectorCodeGenerator::generateSelectorChecker()
</ins><span class="cx"> {
</span><del>- bool needsEpilogue = generatePrologue();
-
</del><span class="cx"> Vector<StackAllocator::StackReference> calleeSavedRegisterStackReferences;
</span><span class="cx"> bool reservedCalleeSavedRegisters = false;
</span><span class="cx"> unsigned availableRegisterCount = m_registerAllocator.availableRegisterCount();
</span><span class="cx"> unsigned minimumRegisterCountForAttributes = minimumRegisterRequirements(m_selectorFragments);
</span><ins>+ if (minimumRegisterCountForAttributes > registerCount) {
+#if !CPU(ARM_THUMB2)
+ // ARM_THUMB2 does not have enough registers to compile complicated selectors.
+ // Compiling should always succeed on non-ARM_THUMB2 CPUs.
+ ASSERT_NOT_REACHED();
+#endif
</ins><span class="cx"> #if CSS_SELECTOR_JIT_DEBUGGING
</span><ins>+ dataLogF("Failed to compile because it would have required %u registers\n", minimumRegisterCountForAttributes);
+#endif
+ return false;
+ }
+#if CSS_SELECTOR_JIT_DEBUGGING
</ins><span class="cx"> dataLogF("Compiling with minimum required register count %u\n", minimumRegisterCountForAttributes);
</span><span class="cx"> #endif
</span><ins>+
+ bool needsEpilogue = generatePrologue();
+
</ins><span class="cx"> ASSERT(minimumRegisterCountForAttributes <= registerCount);
</span><span class="cx"> if (availableRegisterCount < minimumRegisterCountForAttributes) {
</span><span class="cx"> reservedCalleeSavedRegisters = true;
</span><span class="lines">@@ -1215,6 +1239,7 @@
</span><span class="cx"> generateEpilogue();
</span><span class="cx"> m_assembler.ret();
</span><span class="cx"> }
</span><ins>+ return true;
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> static inline Assembler::Jump testIsElementFlagOnNode(Assembler::ResultCondition condition, Assembler& assembler, Assembler::RegisterID nodeAddress)
</span><span class="lines">@@ -1362,14 +1387,22 @@
</span><span class="cx"> LocalRegister childStyle(m_registerAllocator);
</span><span class="cx"> m_assembler.loadPtr(Assembler::Address(checkingContext, OBJECT_OFFSETOF(CheckingContext, elementStyle)), childStyle);
</span><span class="cx">
</span><ins>+ Assembler::Address flagAddress(childStyle, RenderStyle::noninheritedFlagsMemoryOffset() + RenderStyle::NonInheritedFlags::flagsMemoryOffset());
+#if CPU(ARM_THUMB2)
+ Assembler::Address flagLowAddress(childStyle, RenderStyle::noninheritedFlagsMemoryOffset() + RenderStyle::NonInheritedFlags::flagsMemoryOffset() + 4);
+ m_assembler.or32(Assembler::TrustedImm32(newFlag >> 32), flagAddress);
+ m_assembler.or32(Assembler::TrustedImm32(newFlag & 0xFFFFFFFF), flagLowAddress);
+#elif CPU(X86_64) || CPU(ARM)
</ins><span class="cx"> // FIXME: We should look into doing something smart in MacroAssembler instead.
</span><span class="cx"> LocalRegister flags(m_registerAllocator);
</span><del>- Assembler::Address flagAddress(childStyle, RenderStyle::noninheritedFlagsMemoryOffset() + RenderStyle::NonInheritedFlags::flagsMemoryOffset());
</del><span class="cx"> m_assembler.load64(flagAddress, flags);
</span><span class="cx"> LocalRegister isFirstChildStateFlagImmediate(m_registerAllocator);
</span><span class="cx"> m_assembler.move(Assembler::TrustedImm64(newFlag), isFirstChildStateFlagImmediate);
</span><span class="cx"> m_assembler.or64(isFirstChildStateFlagImmediate, flags);
</span><span class="cx"> m_assembler.store64(flags, flagAddress);
</span><ins>+#else
+#error SelectorCodeGenerator::addFlagsToElementStyleFromContext not implemented for this architecture.
+#endif
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> Assembler::JumpList SelectorCodeGenerator::jumpIfNoPreviousAdjacentElement()
</span><span class="lines">@@ -1428,12 +1461,16 @@
</span><span class="cx"> Assembler::Jump SelectorCodeGenerator::modulo(Assembler::ResultCondition condition, Assembler::RegisterID inputDividend, int divisor)
</span><span class="cx"> {
</span><span class="cx"> RELEASE_ASSERT(divisor);
</span><del>-#if CPU(ARM64)
</del><ins>+#if CPU(ARM64) || CPU(APPLE_ARMV7S)
</ins><span class="cx"> LocalRegister divisorRegister(m_registerAllocator);
</span><span class="cx"> m_assembler.move(Assembler::TrustedImm32(divisor), divisorRegister);
</span><span class="cx">
</span><span class="cx"> LocalRegister resultRegister(m_registerAllocator);
</span><ins>+#if CPU(APPLE_ARMV7S)
+ m_assembler.m_assembler.sdiv(resultRegister, inputDividend, divisorRegister);
+#elif CPU(ARM64)
</ins><span class="cx"> m_assembler.m_assembler.sdiv<32>(resultRegister, inputDividend, divisorRegister);
</span><ins>+#endif
</ins><span class="cx"> m_assembler.mul32(divisorRegister, resultRegister);
</span><span class="cx"> return m_assembler.branchSub32(condition, inputDividend, resultRegister, resultRegister);
</span><span class="cx"> #elif CPU(X86_64)
</span><span class="lines">@@ -1817,7 +1854,7 @@
</span><span class="cx"> {
</span><span class="cx"> isShareableElementData.link(&m_assembler);
</span><span class="cx"> m_assembler.urshift32(elementDataArraySizeAndFlags, Assembler::TrustedImm32(ElementData::arraySizeOffset()), attributeArrayLength);
</span><del>- m_assembler.add64(Assembler::TrustedImm32(ShareableElementData::attributeArrayMemoryOffset()), elementDataAddress, attributeArrayPointer);
</del><ins>+ m_assembler.addPtr(Assembler::TrustedImm32(ShareableElementData::attributeArrayMemoryOffset()), elementDataAddress, attributeArrayPointer);
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> skipShareable.link(&m_assembler);
</span></span></pre>
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