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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/166732">166732</a></dd>
<dt>Author</dt> <dd>mark.lam@apple.com</dd>
<dt>Date</dt> <dd>2014-04-03 11:25:26 -0700 (Thu, 03 Apr 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>Fix bit rot in ARMv7 JIT probe mechanism.
<https://webkit.org/b/131167>
Reviewed by Geoffrey Garen.
1. The macro assembler does not support pushing the SP register. Worked
around this by pushing the LR register as a placeholder, and then
writing the original SP value to that slot.
2. The CPUState field in the ProbeContext needs to be aligned on a 4
byte boundary, not an 8 byte boundary.
* assembler/MacroAssemblerARMv7.cpp:
(JSC::MacroAssemblerARMv7::probe):
* jit/JITStubsARMv7.h:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerMacroAssemblerARMv7cpp">trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCorejitJITStubsARMv7h">trunk/Source/JavaScriptCore/jit/JITStubsARMv7.h</a></li>
</ul>
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<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (166731 => 166732)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-04-03 18:06:50 UTC (rev 166731)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-04-03 18:25:26 UTC (rev 166732)
</span><span class="lines">@@ -1,3 +1,20 @@
</span><ins>+2014-04-03 Mark Lam <mark.lam@apple.com>
+
+ Fix bit rot in ARMv7 JIT probe mechanism.
+ <https://webkit.org/b/131167>
+
+ Reviewed by Geoffrey Garen.
+
+ 1. The macro assembler does not support pushing the SP register. Worked
+ around this by pushing the LR register as a placeholder, and then
+ writing the original SP value to that slot.
+ 2. The CPUState field in the ProbeContext needs to be aligned on a 4
+ byte boundary, not an 8 byte boundary.
+
+ * assembler/MacroAssemblerARMv7.cpp:
+ (JSC::MacroAssemblerARMv7::probe):
+ * jit/JITStubsARMv7.h:
+
</ins><span class="cx"> 2014-04-02 Mark Lam <mark.lam@apple.com>
</span><span class="cx">
</span><span class="cx"> ARMv7 compare32() should not use TST to do CMP's job.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerMacroAssemblerARMv7cpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp (166731 => 166732)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp 2014-04-03 18:06:50 UTC (rev 166731)
+++ trunk/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.cpp 2014-04-03 18:25:26 UTC (rev 166732)
</span><span class="lines">@@ -82,8 +82,10 @@
</span><span class="cx">
</span><span class="cx"> void MacroAssemblerARMv7::probe(MacroAssemblerARMv7::ProbeFunction function, void* arg1, void* arg2)
</span><span class="cx"> {
</span><del>- push(RegisterID::sp);
</del><span class="cx"> push(RegisterID::lr);
</span><ins>+ push(RegisterID::lr);
+ add32(TrustedImm32(8), RegisterID::sp, RegisterID::lr);
+ store32(RegisterID::lr, ArmAddress(RegisterID::sp, 4));
</ins><span class="cx"> push(RegisterID::ip);
</span><span class="cx"> push(RegisterID::r0);
</span><span class="cx"> // The following uses RegisterID::ip. So, they must come after we push ip above.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCorejitJITStubsARMv7h"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/jit/JITStubsARMv7.h (166731 => 166732)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/jit/JITStubsARMv7.h 2014-04-03 18:06:50 UTC (rev 166731)
+++ trunk/Source/JavaScriptCore/jit/JITStubsARMv7.h 2014-04-03 18:25:26 UTC (rev 166732)
</span><span class="lines">@@ -52,7 +52,7 @@
</span><span class="cx"> #define PROBE_ARG1_OFFSET (1 * PTR_SIZE)
</span><span class="cx"> #define PROBE_ARG2_OFFSET (2 * PTR_SIZE)
</span><span class="cx">
</span><del>-#define PROBE_FIRST_GPREG_OFFSET (4 * PTR_SIZE)
</del><ins>+#define PROBE_FIRST_GPREG_OFFSET (3 * PTR_SIZE)
</ins><span class="cx">
</span><span class="cx"> #define GPREG_SIZE 4
</span><span class="cx"> #define PROBE_CPU_R0_OFFSET (PROBE_FIRST_GPREG_OFFSET + (0 * GPREG_SIZE))
</span></span></pre>
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