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<dt>Revision</dt> <dd><a href="http://trac.webkit.org/projects/webkit/changeset/164673">164673</a></dd>
<dt>Author</dt> <dd>fpizlo@apple.com</dd>
<dt>Date</dt> <dd>2014-02-25 14:18:21 -0800 (Tue, 25 Feb 2014)</dd>
</dl>
<h3>Log Message</h3>
<pre>Inline caching in the FTL on ARM64 should "work"
https://bugs.webkit.org/show_bug.cgi?id=129334
Reviewed by Mark Hahnenberg.
Gets us to the point where simple tests that use inline caching are passing.
* assembler/LinkBuffer.cpp:
(JSC::LinkBuffer::copyCompactAndLinkCode):
(JSC::LinkBuffer::shrink):
* ftl/FTLInlineCacheSize.cpp:
(JSC::FTL::sizeOfGetById):
(JSC::FTL::sizeOfPutById):
(JSC::FTL::sizeOfCall):
* ftl/FTLOSRExitCompiler.cpp:
(JSC::FTL::compileFTLOSRExit):
* ftl/FTLThunks.cpp:
(JSC::FTL::osrExitGenerationThunkGenerator):
* jit/GPRInfo.h:
* offlineasm/arm64.rb:</pre>
<h3>Modified Paths</h3>
<ul>
<li><a href="#trunkSourceJavaScriptCoreChangeLog">trunk/Source/JavaScriptCore/ChangeLog</a></li>
<li><a href="#trunkSourceJavaScriptCoreassemblerLinkBuffercpp">trunk/Source/JavaScriptCore/assembler/LinkBuffer.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreftlFTLInlineCacheSizecpp">trunk/Source/JavaScriptCore/ftl/FTLInlineCacheSize.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreftlFTLOSRExitCompilercpp">trunk/Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCoreftlFTLThunkscpp">trunk/Source/JavaScriptCore/ftl/FTLThunks.cpp</a></li>
<li><a href="#trunkSourceJavaScriptCorejitGPRInfoh">trunk/Source/JavaScriptCore/jit/GPRInfo.h</a></li>
<li><a href="#trunkSourceJavaScriptCoreofflineasmarm64rb">trunk/Source/JavaScriptCore/offlineasm/arm64.rb</a></li>
</ul>
</div>
<div id="patch">
<h3>Diff</h3>
<a id="trunkSourceJavaScriptCoreChangeLog"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ChangeLog (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ChangeLog 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/ChangeLog 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -1,3 +1,26 @@
</span><ins>+2014-02-25 Filip Pizlo <fpizlo@apple.com>
+
+ Inline caching in the FTL on ARM64 should "work"
+ https://bugs.webkit.org/show_bug.cgi?id=129334
+
+ Reviewed by Mark Hahnenberg.
+
+ Gets us to the point where simple tests that use inline caching are passing.
+
+ * assembler/LinkBuffer.cpp:
+ (JSC::LinkBuffer::copyCompactAndLinkCode):
+ (JSC::LinkBuffer::shrink):
+ * ftl/FTLInlineCacheSize.cpp:
+ (JSC::FTL::sizeOfGetById):
+ (JSC::FTL::sizeOfPutById):
+ (JSC::FTL::sizeOfCall):
+ * ftl/FTLOSRExitCompiler.cpp:
+ (JSC::FTL::compileFTLOSRExit):
+ * ftl/FTLThunks.cpp:
+ (JSC::FTL::osrExitGenerationThunkGenerator):
+ * jit/GPRInfo.h:
+ * offlineasm/arm64.rb:
+
</ins><span class="cx"> 2014-02-25 Commit Queue <commit-queue@webkit.org>
</span><span class="cx">
</span><span class="cx"> Unreviewed, rolling out r164627.
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreassemblerLinkBuffercpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/assembler/LinkBuffer.cpp (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/assembler/LinkBuffer.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/assembler/LinkBuffer.cpp 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -82,6 +82,8 @@
</span><span class="cx"> {
</span><span class="cx"> m_initialSize = m_assembler->m_assembler.codeSize();
</span><span class="cx"> allocate(m_initialSize, ownerUID, effort);
</span><ins>+ if (didFailToAllocate())
+ return;
</ins><span class="cx"> uint8_t* inData = (uint8_t*)m_assembler->unlinkedCode();
</span><span class="cx"> uint8_t* outData = reinterpret_cast<uint8_t*>(m_code);
</span><span class="cx"> int readPtr = 0;
</span><span class="lines">@@ -196,6 +198,8 @@
</span><span class="cx">
</span><span class="cx"> void LinkBuffer::shrink(size_t newSize)
</span><span class="cx"> {
</span><ins>+ if (!m_executableMemory)
+ return;
</ins><span class="cx"> m_size = newSize;
</span><span class="cx"> m_executableMemory->shrink(m_size);
</span><span class="cx"> }
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreftlFTLInlineCacheSizecpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ftl/FTLInlineCacheSize.cpp (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ftl/FTLInlineCacheSize.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/ftl/FTLInlineCacheSize.cpp 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -1,5 +1,5 @@
</span><span class="cx"> /*
</span><del>- * Copyright (C) 2013 Apple Inc. All rights reserved.
</del><ins>+ * Copyright (C) 2013, 2014 Apple Inc. All rights reserved.
</ins><span class="cx"> *
</span><span class="cx"> * Redistribution and use in source and binary forms, with or without
</span><span class="cx"> * modification, are permitted provided that the following conditions
</span><span class="lines">@@ -33,23 +33,41 @@
</span><span class="cx">
</span><span class="cx"> namespace JSC { namespace FTL {
</span><span class="cx">
</span><del>-// These sizes are x86-64-specific, and were found empirically. They have to cover the worst
-// possible combination of registers leading to the largest possible encoding of each
-// instruction in the IC.
</del><ins>+// The default sizes are x86-64-specific, and were found empirically. They have to cover the worst
+// possible combination of registers leading to the largest possible encoding of each instruction in
+// the IC.
+//
+// FIXME: The ARM64 sizes are overestimates; if there is any branch compaction then we should be able
+// to get away with less. The branch compaction code currently validates the size of the IC before
+// doing any compaction, so we need to overestimate and give the uncompacted size. This would be
+// relatively easy to fix.
+// https://bugs.webkit.org/show_bug.cgi?id=129335
</ins><span class="cx">
</span><span class="cx"> size_t sizeOfGetById()
</span><span class="cx"> {
</span><ins>+#if CPU(ARM64)
+ return 36;
+#else
</ins><span class="cx"> return 30;
</span><ins>+#endif
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> size_t sizeOfPutById()
</span><span class="cx"> {
</span><ins>+#if CPU(ARM64)
+ return 44;
+#else
</ins><span class="cx"> return 32;
</span><ins>+#endif
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> size_t sizeOfCall()
</span><span class="cx"> {
</span><ins>+#if CPU(ARM64)
+ return 44;
+#else
</ins><span class="cx"> return 43;
</span><ins>+#endif
</ins><span class="cx"> }
</span><span class="cx">
</span><span class="cx"> } } // namespace JSC::FTL
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreftlFTLOSRExitCompilercpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -354,6 +354,8 @@
</span><span class="cx"> {
</span><span class="cx"> SamplingRegion samplingRegion("FTL OSR Exit Compilation");
</span><span class="cx">
</span><ins>+ dataLog("Compiling OSR exit with exitID = ", exitID, "\n");
+
</ins><span class="cx"> CodeBlock* codeBlock = exec->codeBlock();
</span><span class="cx">
</span><span class="cx"> ASSERT(codeBlock);
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreftlFTLThunkscpp"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/ftl/FTLThunks.cpp (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/ftl/FTLThunks.cpp 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/ftl/FTLThunks.cpp 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -70,7 +70,9 @@
</span><span class="cx"> jit.storePtr(MacroAssembler::TrustedImmPtr(requiredScratchMemorySizeInBytes()), GPRInfo::nonArgGPR1);
</span><span class="cx">
</span><span class="cx"> jit.loadPtr(GPRInfo::callFrameRegister, GPRInfo::argumentGPR0);
</span><del>- jit.peek(GPRInfo::argumentGPR1, (stackMisalignment / sizeof(void*)) - 1);
</del><ins>+ jit.peek(
+ GPRInfo::argumentGPR1,
+ (stackMisalignment - MacroAssembler::pushToSaveByteOffset()) / sizeof(void*));
</ins><span class="cx"> MacroAssembler::Call functionCall = jit.call();
</span><span class="cx">
</span><span class="cx"> // At this point we want to make a tail call to what was returned to us in the
</span></span></pre></div>
<a id="trunkSourceJavaScriptCorejitGPRInfoh"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/jit/GPRInfo.h (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/jit/GPRInfo.h 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/jit/GPRInfo.h 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -548,8 +548,8 @@
</span><span class="cx"> static const GPRReg regT1 = ARM64Registers::x1;
</span><span class="cx"> static const GPRReg regT2 = ARM64Registers::x2;
</span><span class="cx"> static const GPRReg regT3 = ARM64Registers::x23;
</span><del>- static const GPRReg regT4 = ARM64Registers::x24;
- static const GPRReg regT5 = ARM64Registers::x5;
</del><ins>+ static const GPRReg regT4 = ARM64Registers::x5;
+ static const GPRReg regT5 = ARM64Registers::x24;
</ins><span class="cx"> static const GPRReg regT6 = ARM64Registers::x6;
</span><span class="cx"> static const GPRReg regT7 = ARM64Registers::x7;
</span><span class="cx"> static const GPRReg regT8 = ARM64Registers::x8;
</span><span class="lines">@@ -564,9 +564,9 @@
</span><span class="cx"> static const GPRReg argumentGPR0 = ARM64Registers::x0; // regT0
</span><span class="cx"> static const GPRReg argumentGPR1 = ARM64Registers::x1; // regT1
</span><span class="cx"> static const GPRReg argumentGPR2 = ARM64Registers::x2; // regT2
</span><del>- static const GPRReg argumentGPR3 = ARM64Registers::x3; // regT3
- static const GPRReg argumentGPR4 = ARM64Registers::x4; // regT4
- static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT5
</del><ins>+ static const GPRReg argumentGPR3 = ARM64Registers::x3;
+ static const GPRReg argumentGPR4 = ARM64Registers::x4;
+ static const GPRReg argumentGPR5 = ARM64Registers::x5; // regT4
</ins><span class="cx"> static const GPRReg argumentGPR6 = ARM64Registers::x6; // regT6
</span><span class="cx"> static const GPRReg argumentGPR7 = ARM64Registers::x7; // regT7
</span><span class="cx"> static const GPRReg nonArgGPR0 = ARM64Registers::x8; // regT8
</span></span></pre></div>
<a id="trunkSourceJavaScriptCoreofflineasmarm64rb"></a>
<div class="modfile"><h4>Modified: trunk/Source/JavaScriptCore/offlineasm/arm64.rb (164672 => 164673)</h4>
<pre class="diff"><span>
<span class="info">--- trunk/Source/JavaScriptCore/offlineasm/arm64.rb 2014-02-25 21:42:43 UTC (rev 164672)
+++ trunk/Source/JavaScriptCore/offlineasm/arm64.rb 2014-02-25 22:18:21 UTC (rev 164673)
</span><span class="lines">@@ -40,14 +40,14 @@
</span><span class="cx"> # x1 => t1, a1, r1
</span><span class="cx"> # x2 => t2, a2
</span><span class="cx"> # x3 => a3
</span><del>-# x5 => t5
</del><ins>+# x5 => t4
</ins><span class="cx"> # x6 => t6
</span><span class="cx"> # x9 => (nonArgGPR1 in baseline)
</span><span class="cx"> # x13 => scratch (unused in baseline)
</span><span class="cx"> # x16 => scratch
</span><span class="cx"> # x17 => scratch
</span><span class="cx"> # x23 => t3
</span><del>-# x24 => t4
</del><ins>+# x24 => t5
</ins><span class="cx"> # x27 => csr1 (tagTypeNumber)
</span><span class="cx"> # x28 => csr2 (tagMask)
</span><span class="cx"> # x29 => cfr
</span><span class="lines">@@ -113,9 +113,9 @@
</span><span class="cx"> when 't3'
</span><span class="cx"> arm64GPRName('x23', kind)
</span><span class="cx"> when 't4'
</span><ins>+ arm64GPRName('x5', kind)
+ when 't5'
</ins><span class="cx"> arm64GPRName('x24', kind)
</span><del>- when 't5'
- arm64GPRName('x5', kind)
</del><span class="cx"> when 't6'
</span><span class="cx"> arm64GPRName('x6', kind)
</span><span class="cx"> when 'cfr'
</span></span></pre>
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