[webkit-changes] [WebKit/WebKit] 4dea5d: [WebAssembly SIMD] Support bitwise operations on I...

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  Branch: refs/heads/main
  Home:   https://github.com/WebKit/WebKit
  Commit: 4dea5d54cd4a77e83dbf3fb6de01cc7c81d23d22
      https://github.com/WebKit/WebKit/commit/4dea5d54cd4a77e83dbf3fb6de01cc7c81d23d22
  Author: David Degazio <d_degazio at apple.com>
  Date:   2022-12-09 (Fri, 09 Dec 2022)

  Changed paths:
    M Source/JavaScriptCore/assembler/MacroAssemblerARM64.h
    M Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
    M Source/JavaScriptCore/assembler/X86Assembler.h
    M Source/JavaScriptCore/b3/air/AirLowerMacros.cpp
    M Source/JavaScriptCore/b3/air/AirOpcode.opcodes
    M Source/JavaScriptCore/wasm/WasmAirIRGenerator.cpp

  Log Message:
  -----------
  [WebAssembly SIMD] Support bitwise operations on Intel
https://bugs.webkit.org/show_bug.cgi?id=248639
rdar://103089683

Reviewed by Yusuke Suzuki.

Adds support for SIMD bitwise operations (AND, OR, XOR, ANDN, NOT, shifts, any/all_true,
bitmask/select) to the Intel macro assembler. Currently omits shifts and popcnt for i8x16
vectors, since they aren't supported natively on Intel and are pretty involved to emulate.

* Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h:
(JSC::MacroAssemblerX86_64::compareIntegerVectorWithZero):
(JSC::MacroAssemblerX86_64::vectorAnd):
(JSC::MacroAssemblerX86_64::vectorAndnot):
(JSC::MacroAssemblerX86_64::vectorOr):
(JSC::MacroAssemblerX86_64::vectorXor):
(JSC::MacroAssemblerX86_64::vectorUshl):
(JSC::MacroAssemblerX86_64::vectorUshr):
(JSC::MacroAssemblerX86_64::vectorSshr):
(JSC::MacroAssemblerX86_64::vectorAnyTrue):
(JSC::MacroAssemblerX86_64::vectorAllTrue):
(JSC::MacroAssemblerX86_64::vectorNot): Deleted.
* Source/JavaScriptCore/assembler/X86Assembler.h:
(JSC::X86Assembler::vandps_rrr):
(JSC::X86Assembler::vandpd_rrr):
(JSC::X86Assembler::vorps_rrr):
(JSC::X86Assembler::vorpd_rrr):
(JSC::X86Assembler::vxorps_rrr):
(JSC::X86Assembler::vxorpd_rrr):
(JSC::X86Assembler::vandnps_rrr):
(JSC::X86Assembler::vandnpd_rrr):
(JSC::X86Assembler::vpmovmskb_rr):
(JSC::X86Assembler::vmovmskps_rr):
(JSC::X86Assembler::vmovmskpd_rr):
(JSC::X86Assembler::vptest_rr):
(JSC::X86Assembler::vpsllw_rrr):
(JSC::X86Assembler::vpslld_rrr):
(JSC::X86Assembler::vpsllq_rrr):
(JSC::X86Assembler::vpsrlw_rrr):
(JSC::X86Assembler::vpsrld_rrr):
(JSC::X86Assembler::vpsrlq_rrr):
(JSC::X86Assembler::vpsraw_rrr):
(JSC::X86Assembler::vpsrad_rrr):
(JSC::X86Assembler::vpsraq_rrr):
(JSC::X86Assembler::andps_rr):
(JSC::X86Assembler::orps_rr):
* Source/JavaScriptCore/b3/air/AirLowerMacros.cpp:
(JSC::B3::Air::lowerMacros):
* Source/JavaScriptCore/b3/air/AirOpcode.opcodes:
* Source/JavaScriptCore/wasm/WasmAirIRGenerator.cpp:
(JSC::Wasm::AirIRGenerator::addSIMDI_V):
(JSC::Wasm::AirIRGenerator::addSIMDV_V):
(JSC::Wasm::AirIRGenerator::addConstant):
(JSC::Wasm::AirIRGenerator::addSIMDShift):

Canonical link: https://commits.webkit.org/257640@main